M. Jang and T. Na*, “SRAM-SA,” in preparation.
S. Ahn†, M. Jang†, M. Han, B. Ishdorj, S. Lee, and T. Na*, “A practical MRAM logic-in-memory platform with reference-bitline structure,” IEEE Solid-State Circuits Letters (SSC-L), vol. 9, pp. xxx-yyy, Aug. 2026. (Link)