Google Schorlar : https://scholar.google.co.kr/citations?user=OTUW22cAAAAJ&hl=ko
Web of Science : https://www.webofscience.com/wos/author/record/V-5237-2019
SCIE Journal Papers (5 Selected Papers - "Original Ideas")
(1) MK Park, J Hwang, KM Lee, SY Woo, JJ Kim, JH Bae*, JH Lee*, "Lateral Migration-based Flash-like Synaptic Device for Hybrid Off-chip/On-chip Training," Advanced Electronic Materials, 2300866, 2024.
(2) SY Woo, D Kwon, BG Park, JH Lee*, JH Bae*, "Demonstration of Pulse Width Modulation Function Using Single Positive Feedback Device for Neuron," IEEE Electron Device Letters, vol. 44, no. 1, pp.5-8, 2023.
(3) W Shin⫮, KK Min⫮, JH Bae⫮, J Yim, D Kwon, Y Kim, J Yu, J Hwang, BG Park, D Kwon, JH Lee*, (⫮Co-first authors) "Comprehensive and accurate analysis of the working principle in ferroelectric tunnel junctions using low-frequency noise spectroscopy," Nanoscale, vol.14, no.6, pp.2177-2185, 2022. (Highlighted - Front Cover)
(4) JH Bae, D Kwon*, N Jeon, S Cheema, AJ Tan, C Hu, S Salahuddin*, "Highly scaled, high endurance, Ω-gate, nanowire ferroelectric FET memory transistors," IEEE Electron Device Letters, vol. 41, no. 11, pp. 1637-1640, 2020.
(5) K Lee⫮, JH Bae⫮, S Kim, JH Lee, BG Park, D Kwon* (⫮co-first authors), "Ferroelectric-gate field-effect transistor memory with recessed channel," IEEE Electron Device Letters, vol. 41, no. 8, pp. 1201-1204, 2020.
Conferences (5 Selected Presentations)
(1) JH Bae, "Ferroelectric-Based Next Generation FLASH Memory Technologies," 2023 Korean Conference on Semiconductor (KCS2023), 2023. (Short Course)
(2) JH Bae, "Reliability and Variability of Semiconductor Devices and Their Effect on Artificial Neural Networks," The 20th International Symposium on the Physics of Semiconductors and Applications (ISPSA 2022), 2022. (Invited Talk)
(3) JH Bae, Haesung Kim, and Hyojin Yang, "Electrical Characterization of Ferroelectric Memory Devices," 2022 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2022), 2022. (Invited Talk)
(4) JH Bae, "Implementation of charge trap gated-diode synaptic device with near-linear conductance response for hardware-based neural network," 2021 The IEEE Region 10 Symposium (TENSYMP 2021), 2021. (Invited Talk)
(5) JH Bae, "Ferroelectric HfO2-based devices for scalable CMOS compatible memory," Nano Convergence Conference 2021 (NCC 2021), 2021. (Invited Talk)
Full List (SCIE Journals, IEEE IEDM/VLSI, etc.) (Google Scholar Link)
(1) H Lee, S Kim, C Han, H Kim, H Yang, S Park, S Yun, YJ Lee, SJ Choi, DH Kim, DM Kim, D Kwon*, JH Bae*, "Analysis on Tunneling-Related... FeFET..." (In Prep.-Writing)
(0) J Park, H Kim, S Yun, SJ Choi, DH Kim, DM Kim, JH Bae*, "Low Frequency Noise... FeFET..." (Submitted)
(0) HJ Kim, H Yang, H Kim, S Park, HN Lee, SJ Choi, DH Kim, DM Kim, MK Park*, JH Bae*, "Analysis of Spatial Distribution of... FeFET..." (Submitted)
(0) S Park, H Yang, H Kim, H Jeong, SJ Choi, DH Kim, DM Kim, MK Park, JH Bae*, "Analysis of Operation Delay and Switching...FeFET..." (Submitted)
(0) H Yang, S Park, S Yun, H Kim, H Lee, MK Park, SJ Choi, DH Kim, DM Kim, D Kwon*, JH Bae*, "Exploration of... FeFET...," (In Revision-Peer Review)
(12) J Jang, J Lee, JH Bae, S Cho, S KIm, "InGaZnO-based synaptic transistor with embedded ZnO charge-trapping layer for reservoir computing," Sensors and Actuators A: Physical, vol.373, p.115405, 2024
(11) J Park, S Lee, SJ Myoung, H Lee, JH Bae, SJ Choi, DM Kim, C Kim, DH Kim, "Influence of RF power in the sputter deposition of amorphous InGaZnO film on the transient drain current of amorphous InGaZnO thin-film transistors," Solid-State Electronics, vol.216, p.108921, 2024.
(10) DH Shin, SJ Myoung, D Kim, C Kim, JH Bae, SJ Choi, DM Kim, J Woo, DH Kim, "Effect of RF power on analog synaptic behavior of sputter-deposited InGaZnO films for neuromorphic computing applications," Ceramics International, 2024 (In Press).
(9) J Jang, J Lee, JH Bae, S Cho, S KIm, "InGaZnO-based synaptic transistor with embedded ZnO charge-trapping layer for reservoir computing," Sensors and Actuators A: Physical, p.115405, 2024.
(8) HI Yang, H Lee, J Ko, Y An, G Min, DM Kim, JH Bae, M Lim, SJ Choi, "Simulation of a randomly percolated CNT network for an improved analog physical unclonable function," Scientific Reports, vol.14, no.1, p.8811, 2024.
(7) J Park, S Lee, SJ Myoung, H Lee, JH Bae, SJ CHoi, DM Kim, C Kim, DH Kim, "Influence of RF power in the sputter deposition of amorphous InGaZnO film on the transient drain current of amorphous InGaZnO thin-film transistors," Solid-State Electronics, p.108921, 2024.
(6) TJ Yang, JR Cho, H Lee, HJ Lee, SJ Myoung, SJ Choi, JH Bae, DM Kim, C Kim, J Woo, DH Kim, "Improvement of the Symmetry and Linearity of Synaptic Weight Update by Combining the InGaZnO Synaptic Transistor and Memristor," IEEE Access, vol.12, p.28531, 2024
(5) S Lee, H Kim, H Yang, S Yun, J Park, H Lee, S Park, SJ Choi, DH Kim, DM Kim, DW Kwon*, JH Bae*, "Analysis of the Role of Interfacial Layer in Ferroelectric FET Failure as a Memory Cell," IEEE Electron Device Letters, vol. 45, no. 4, p.562, 2024.
(4) Y An, H Lee, J Ko, HI Yang, G Min, DM Kim, DH Kim, JH Bae, MH Kang, SJ Choi, "Gate Capacitance Coupling of Double-Gate Carbon Nanotube Network Transistors," ACS Applied Materials and Interfaces, vol.16, no.5, p.6221, 2024.
(3) KH Lee, D Kwon, IS Lee, J Hwang, J Im, JH Bae, WY Choi, SY Woo, JH Lee, "Si‐Based Dual‐Gate Field‐Effect Transistor Array for Low‐Power On‐Chip Trainable Hardware Neural Networks," Advanced Intelligent Systems, vol.6, no.1, p.2300490, 2024.
(2) MK Park, J Hwang, KM Lee, SY Woo, JJ Kim, JH Bae*, JH Lee*, "Lateral Migration-based Flash-like Synaptic Device for Hybrid Off-chip/On-chip Training," Advanced Electronic Materials, 2300866, 2024.
(1) H Kim, H Yang, S Lee, S Yun, J Park, S Park, HN Lee, H Kim, SJ Choi, DH Kim, DM Kim, D Kwon*, JH Bae*, "Comprehensive Analysis of Read-after-Write Latency in HfZrOX-based Ferroelectric Field-Effect-Transistors with SiO2 Interfacial Layer," Applied Physics Letters, vol.124, no.3, p.033503, 2024.
(19) D Kwon, SY Woo, J Hwang, H Kim, JH Bae, W Shin, BG Park, JH Lee*, "Efficient Hybrid Training Method for Neuromorphic Hardware Using Analog Nonvolatile Memory," IEEE Transactions on Neural Networks and Learning Systems, 2023 (Early Access)
(18) D Kwon, EC Park, W Shin, RH Koo, J Hwang, JH Bae, D Kwon, JH Lee*, "Analog Synaptic Devices Based on IGZO Thin‐Film Transistors with a Metal–Ferroelectric–Metal–Insulator–Semiconductor Structure for High‐Performance Neuromorphic Systems," Advanced Intelligent Systems, vol.5, no.12, p.2300125, 2023.
(17) D Kwon, SY Woo, KH Lee, J Hwang, H Kim, SH Park, W Shin, JH Bae, JJ Kim, JH Lee*, "Reconfigurable neuromorphic computing block through integration of flash synapse arrays and super-steep neurons," Science Advances, vol.9, no.29, p.eadg9123, 2023.
(16) Y An, Y Lee, DM Kim, DH Kim, JH Bae, MH Kang, SJ Choi*, "Wafer-scale striped network transistors based on purified semiconducting carbon nanotubes for commercialization," Nanotechnology, vol.34, no.40, p.405202, 2023.
(15) D Kwon, MK Park, WM Kang, J Hwang, RH Koo, JH Bae*, JH Lee*, "Hardware-Based Ternary Neural Network Using AND-Type Poly-Si TFT Array and Its Optimization Guideline," IEEE Transactions on Electron Devices, vol.70, no.8, pp.4206-4212, 2023.
(14) H Kim, HB Yoo, H Lee, JH Ryu, JY Park, SH Han, H Yang, JH Bae, SJ Choi, DH Kim, DM Kim*, "Extraction Technique for the Conduction Band Minimum Energy in Amorphous Indium–Gallium–Zinc–Oxide Thin Film Transistors," IEEE Transactions on Electron Devices, vol.70, no.6, pp.3126-3130, 2023.
(13) JY Park, H Kim, HB Yoo, JH Ryu, SH Han, JH Bae, SJ Choi, DH Kim, DM Kim*, "Simultaneous Extraction of Mobility Enhancement Factor and Threshold Voltage With Parasitic Resistances in Amorphous Oxide Semiconductor Thin-Film Transistors," IEEE Transactions on Electron Devices, vol.70, no.5, pp.2312-2316, 2023.
(12) D Kwon, H Kim, KH Lee, J Hwang, W Shin, JH Bae, SY Woo*, JH Lee*, "Super-steep synapses based on positive feedback devices for reliable binary neural networks," Applied Physics Letters, vol.122, no.10, p.102101, 2023.
(11) D Kang, W Kim, JT Jang, C Kim, JN Kim, SJ Choi, JH Bae, DM Kim, Y Kim, DH Kim*, "Short-and Long-Term Memory Based on a Floating-Gate IGZO Synaptic Transistor," IEEE Access, vol.11, pp.20196-20201, 2023.
(10) SJ Myoung, CI Ryoo, C Kim, SJ Choi, DM Kim, JH Bae*, DH Kim* , "Thermal Process and Dopant Diffusion Model of a-InGaZnO TFTs for VT Prediction Using Lateral Carrier Density Profiling Technique," IEEE Electron Device Letters, vol.44, no.4, pp.630-633, 2023.
(9) J Pyo, JH Bae, S Kim, S Cho*, "Short-Term Memory Characteristics of IGZO-Based Three-Terminal Devices," Materials, vol.16, no.3, p.1249, 2023.
(8) TJ Yang, JH Kim, JR Cho, HJ Lee, K Kim, J Park, SJ Choi, JH Bae, DM Kim, C Kim, DW Park, DH Kim*, "Physical model of a local threshold voltage shift in InGaZnO thin-film transistors under current stress for instability-aware circuit design," Current Applied Physics, vol.46, pp.55-60, 2023.
(7) W Shin, KK Min, JH Bae, J Kim, RH Koo, D Kwon, JJ Kim, D Kwon*, JH Lee*, "1/f Noise in Synaptic Ferroelectric Tunnel Junction: Impact on Convolutional Neural Network," Advanced Intelligent Systems, p.2200377, 2023.
(6) HJ Lee, D Kim, WS Choi, C Kim, SJ Choi, JH Bae, DM Kim, S Kim, DH Kim*, "Effect of oxygen flow rate on long-term and short-term Schottky barrier modulations in Pd/IGZO/SiO2/p+-Si memristors," Materials Science in Semiconductor Processing, vol.153 p.107183, 2023.
(5) MK Park, WM Kang, RH Koo, JH Kim, J Hwang, JH Bae, JJ Kim, JH Lee*, "Cointegration of the TFT-Type AND Flash Synaptic Array and CMOS Circuits for a Hardware-Based Neural Network," IEEE Transactions on Electron Devices, vol.70, no.1, pp.93-98, 2023.
(4) S Choi, GW Yang, S Lee, J Park, C Kim, J Park, HS Choi, N Lee, GJ Kim, Y Kim, M Kang, C Kim, JH Bae*, DH Kim*, "Fowler–Nordheim Stress-Induced Degradation of Buried-Channel-Array Transistors in DRAM Cell for Cryogenic Memory Applications," IEEE Transactions on Electron Devices, vol.70, no.1, pp.48-52, 2023.
(3) J Park, S Choi, SJ Myoung, JY Kim, C Kim, SJ Choi, DM Kim, JH Bae*, DH Kim*, "Spatial Degradation Profiling Technique in Self-Aligned Top-Gate a-InGaZnO TFTs Under Current-Flowing Stress," IEEE Electron Device Letters, vol.44, no.1, pp.96-99, 2023.
(2) S Lee, J Park, GW Yang, C Kim, SJ Choi, DM Kim, JH Bae*, DH Kim*, "Analysis of a-InGaZnO TFT Threshold Voltage Instability and Mobility Boosting by Current Stress at a Cryogenic Temperature," IEEE Electron Device Letters, vol.44, no.1, pp.88-91, 2023.
(1) SY Woo, D Kwon, BG Park, JH Lee*, JH Bae*, "Demonstration of Pulse Width Modulation Function Using Single Positive Feedback Device for Neuron," IEEE Electron Device Letters, vol.44, no.1, pp.5-8, 2023.
(16) SY Woo, WM Kang, YT Seo, S Lee, D Kwon, S Oh, JH Bae, JH Lee*, "Demonstration of integrate-and-fire neuron circuit for spiking neural networks," Solid-State Electronics, vol.198, p.108481, 2022.
(15) ST Lee, JH Bae*, "Investigation of Deep Spiking Neural Networks Utilizing Gated Schottky Diode as Synaptic Devices," Micromachines, vol.13, no.11, p.1800, 2022.
(14) W Shin, JH Bae, J Kim, RH Koo, JJ Kim, D Kwon*, JH Lee*, "Variability analysis of ferroelectric FETs in program operation using low-frequency noise spectroscopy," Applied Physics Letters, vol.121 p.163501, 2022.
(13) D Kim, HJ Lee, TJ Yang, WS Choi, C Kim, SJ Choi, JH Bae, DM Kim, S Kim, DH Kim*, "Effect of Post-Annealing on Barrier Modulations in Pd/IGZO/SiO2/p+-Si Memristors," Nanomaterials, vol.12, no.20, p.3582, 2022.
(12) M Hoffmann*, AJ Tan, N Shanker, YH Liao, LC Wang, JH Bae, C Hu, S Salahuddin, "Write Disturb-Free Ferroelectric FETs With Non-Accumulative Switching Dynamics," IEEE Electron Device Letters, vol.43, no.12, pp.2097-2100, 2022.
(11) D Kim, HJ Lee, TJ Yang, WS Choi, C Kim, SJ Choi, JH Bae, DM Kim, S Kim, DH Kim*, "Compact SPICE Model of Memristor with Barrier Modulated Considering Short-and Long-Term Memory Characteristics by IGZO Oxygen Content," Micromachines, vol.13, no.10, p.1630, 2022.
(10) J Park, S Park, JT Jang, SJ Choi, DM Kim, JH Bae, HJ Shin, YS Jeong, JU Bae, CH Oh, C Kim, DH Kim*, "Effect of Positive Bias Stress on the Back-Gate Voltage-Modulated Threshold Voltage in Double-Gate Amorphous InGaZnO Thin-Film Transistors," IEEE Electron Device Letters, vol.43, no.11, pp.1878-1881, 2022.
(9) TJ Yang, J Park, S Choi, C Kim, M Han, JH Bae, SJ Choi, DM Kim, HJ Shin, YS Jeong, JU Bae, CH Oh, DW Park, DH Kim*, "Physics-based compact model of current stress-induced threshold voltage shift in top-gate self-aligned amorphous InGaZnO thin-film transistors," IEEE Electron Device Letters, vol.43, no.10, pp.1685-1688, 2022.
(8) SS Cheema, N Shanker, CH Hsu, A Datar, JH Bae, D Kwon, S Salahuddin*, "One Nanometer HfO2‐Based Ferroelectric Tunnel Junctions on Silicon," Advanced Electronic Materials, vol.8, no.6, p.2100499, 2022.
(7) Y Lee, J Yoon, JW Jeon, H Lee, J Ko, JH Bae, DH Kim, DM Kim, SJ Choi*, "All-Solution-Processed Carbon Nanotube Floating Gate Memories," ACS Applied Nano Materials, vol.5, no.6, pp.7652-7657, 2022.
(6) W Shin⫮, JH Bae⫮, D Kwon, RH Koo, BG Park, D Kwon, JH Lee*, (⫮Co-first authors) "Investigation of low-frequency noise characteristics of ferroelectric tunnel junction: From conduction mechanism and scaling perspectives," IEEE Electron Device Letters, vol.43, no.6 pp.958-961, 2022.
(5) SS Cheema*, N Shanker, LC Wang, CH Hsu, SL Hsu, YH Liao, MS Jose, J Gomez, W Chakraborty, W Li, JH Bae, SK Volkman, D Kwon, Y Rho, G Pinelli, R Rastogi, D Pipitone, C Stull, M Cook, B Tyrrell, VA Stoica, Z Zhang, JW Freeland, CJ Tassone, A Mehta, G Saheli, D Thompson, DI Suh, WT Koo, KJ Nam, DJ Jung, WB Song, CH Lin, S Nam, J Heo, N Parihar, CP Grigoropoulos, P Shafer, P Fay, R Ramesh, S Mahapatra, J Ciston, S Datta, M Mohamed, C Hu, S Salahuddin*, "Ultrathin ferroic HfO2–ZrO2 superlattice gate stack for advanced transistors," Nature, vol.604, no.7904, pp.65-71, 2022.
(4) M Hoffmann*, AJ Tan, N Shanker, YH Liao, LC Wang, JH Bae, C Hu, S Salahuddin "Fast read-after-write and depolarization fields in high endurance n-type ferroelectric FETs," IEEE Electron Device Letters, vol.43, no.5, pp.717-720, 2022.
(3) W Shin, J Yim, JH Bae, JK Lee, S Hong, J Kim, Y Jeong, D Kwon, RH Koo, G Jung, C Han, J Kim, BG Park, D Kwon, JH Lee*, "Synergistic improvement of sensing performance in ferroelectric transistor gas sensors using remnant polarization," Material Horizons, vol.9 no.6 pp.1623-1630, 2022. (Highlighted - Cover)
(2) W Shin⫮, KK Min⫮, JH Bae⫮, J Yim, D Kwon, Y Kim, J Yu, J Hwang, BG Park, D Kwon, JH Lee*, (⫮Co-first authors) "Comprehensive and accurate analysis of the working principle in ferroelectric tunnel junctions using low-frequency noise spectroscopy," Nanoscale, vol.14, no.6, pp.2177-2185, 2022. (Highlighted - Front Cover)
(1) MK Park, HN Yoo, J Hwang, SY Woo, D Kwon, YT Seo, JH Lee*, JH Bae*, "CMOS-compatible low-power gated diode synaptic device for hardware-based neural network," IEEE Transactions on Electron Devices, vol.69, no.2, pp.832-837, 2022.
(24) S Salahuddin*, AJ Tan, SS Cheema, N Shanker, M Hoffmann, JH Bae, "FeFETs for Near-Memory and In-Memory Compute," 2021 IEEE International Electron Devices Meeting (IEDM), 2021, 19.4.
(23) W Li, LC Wang, SS Cheema, N Shanker, JH Park, YH Liao, SL Hsu, CH Hsu, S Volkman, U Sikder, AJ Tan, JH Bae, C Hu, S Salahuddin*, "Demonstration of Low EOT Gate Stack and Record Transconductance on Lg=90 nm nFETs Using 1.8 nm Ferroic HfO2-ZrO2 Superlattice," 2021 IEEE International Electron Devices Meeting (IEDM), 2021, 13.6.
(22) GW Yang, J Park, S Choi, C Kim, DM Kim, SJ Choi, JH Bae, IH Cho, DH Kim*, "Total subgap range density of states-based analysis of the effect of oxygen flow rate on the bias stress instabilities in a-IGZO TFTs," IEEE Transactions on Electron Devices, vol.69, no.1, pp.166-173, 2021.
(21) HB Yoo, H Kim, JH Ryu, J Park, JH Bae, SJ Choi, DH Kim, DM Kim*, "Modeling and characterization of photovoltaic and photoconductive effects in insulated-gate field effect transistors under optical excitation," Solid-State Electronics, vol.186, p.108139, 2021.
(20) W Shin⫮, JH Bae⫮, S Kim, K Lee, D Kwon, BG Park, D Kwon*, JH Lee*, (⫮Co-first authors) "Effects of high-pressure annealing on the low-frequency noise characteristics in ferroelectric FET," IEEE Electron Device Letters, vol.43, no.1, pp.13-16, 2021.
(19) D Kwon, G Jung, W Shin, Y Jeong, S Hong, S Oh, J Kim, JH Bae, BG Park, JH Lee* "Efficient fusion of spiking neural networks and FET-type gas sensors for a fast and reliable artificial olfactory system," Sensors and Actuators B: Chemical, vol.345, p.130419, 2021.
(18) Y Jeong, S Hong, G Jung, W Shin, J Park, D Kim, YS Choi, JH Bae, BH Hong, JH Lee* "Highly stable Si MOSFET-type humidity sensor with ink-jet printed graphene quantum dots sensing layer," Sensors and Actuators B: Chemical, vol.343, p.130134, 2021.
(17) H Kim, HB Yoo, JH Ryu, JH Bae, SJ Choi, DH Kim, DM Kim*, "Current-to-transconductance ratio technique for simultaneous extraction of threshold voltage and parasitic resistances in MOSFETs," Solid-State Electronics, vol.183, p.108133, 2021.
(16) D Kwon, SY Woo, JH Bae, S Lim, BG Park, JH Lee*, "Hardware-based spiking neural networks using capacitor-less positive feedback neuron devices," IEEE Transactions on Electron Devices, vol.68, no.9, pp.4766-4772, 2021.
(15) J Kim, D Kwon, SY Woo, WM Kang, S Lee, S Oh, CH Kim, JH Bae, BG Park, JH Lee*, "On-chip trainable hardware-based deep Q-networks approximating a backpropagation algorithm," Neural Computing and Applications, vol.33, pp.9391-9402, 2021.
(14) D Kwon, G Jung, W Shin, Y Jeong, S Hong, S Oh, JH Bae, BG Park, JH Lee*, "Low-power and reliable gas sensing system based on recurrent neural networks," Sensors and Actuators B: Chemical, vol.340, p.129258, 2021.
(13) HN Yoo, B Choi, JW Back, HJ Kang, E Kwon, S Chung, JH Bae, BG Park, JH Lee*, "Effect of lateral charge diffusion on retention characteristics of 3D NAND flash cells," IEEE Electron Device Letters, vol.42, no.8, pp.1148-1151, 2021.
(12) G Jung, S Hong, Y Jeong, W Shin, J Park, D Kim, JH Bae, BG Park, JH Lee*, "Response Comparison of Resistor-and Si FET-Type Gas Sensors on the Same Substrate," IEEE Transactions on Electron Devices, vol.68, no.7, pp.3552-3557, 2021.
(11) ST Lee, G Yeom, H Yoo, HS Kim, S Lim, JH Bae, BG Park, JH Lee*, "Novel method enabling forward and backward propagations in NAND flash memory for on-chip learning," IEEE Transactions on Electron Devices, vol.68, no.7, pp.3365-3370, 2021.
(10) S Oh, S Lee, SY Woo, D Kwon, J Im, J Hwang, JH Bae, BG Park, JH Lee*, "Spiking Neural Networks With Time-to-First-Spike Coding Using TFT-Type Synaptic Device Model," IEEE Access, vol.9, pp.78098-78107, 2021.
(9) AJ Tan, YH Liao, LC Wang, N Shanker, JH Bae, C Hu, S Salahuddin*, "Ferroelectric HfO2 Memory Transistors With High-κ Interfacial Layer and Write Endurance Exceeding 1010 Cycles," IEEE Electron Device Letters, vol.42, no.7, pp.994-997, 2021.
(8) G Jung, W Shin, S Hong, Y Jeong, J Park, D Kim, JH Bae, BG Park, JH Lee*, "Comparison of the characteristics of semiconductor gas sensors with different transducers fabricated on the same substrate," Sensors and Actuators B: Chemical, vol.335, p.129661, 2021.
(7) JT Jang, HD Kim, C Kim, SJ Choi, JH Bae, DM Kim, HS Kim, DH Kim*, "Observation of Divacancy Formation for ZnON Thin-Film Transistors With Excessive N Content," IEEE Electron Device Letters, vol.42, no.7, pp.1006-1009, 2021.
(6) W Shin, D Kwon, JH Bae, S Lim, BG Park, JH Lee*, "Impacts of program/erase cycling on the low-frequency noise characteristics of reconfigurable gated Schottky diodes," IEEE Electron Device Letters, vol.42, no.6, pp.863-866, 2021.
(5) D Kang, JT Jang, S Park, MHR Ansari, JH Bae, SJ Choi, DM Kim, C Kim, S Cho, DH Kim*, "Threshold-variation-tolerant coupling-gate α-IGZO synaptic transistor for more reliably controllable hardware neuromorphic system," IEEE Access, vol.9, pp.59345-59352, 2021.
(4) JH Kim, JT Jang, JH Bae, SJ Choi, DM Kim, C Kim, Y Kim, DH Kim*, "Analysis of Threshold Voltage Shift for Full VGS/VDS/Oxygen-Content Span under Positive Bias Stress in Bottom-Gate Amorphous InGaZnO Thin-Film Transistors," Micromachines, vol.12, no.3, p.327, 2021
(3) JW Back, MK Park, HN Yoo, JH Bae, S Woo, BG Park, JH Lee*, "Variability of DRAM Peripheral Transistor at Liquid Nitrogen Temperature," IEEE Transactions on Electron Devices, vol.68, no.4, pp.1627-1632, 2021.
(2) J Kim, D Kwon, SY Woo, WM Kang, S Lee, S Oh, CH Kim, JH Bae, BG Park, JH Lee*, "Hardware-based spiking neural network architecture using simplified backpropagation algorithm and homeostasis functionality," Neurocomputing, vol.428, pp.153-165, 2021.
(1) D Kwon, W Shin, JH Bae, S Lim, BG Park, JH Lee*, "Investigation of low-frequency noise characteristics in gated Schottky diodes," IEEE Electron Device Letters, vol.42, no.3, pp.442-445, 2021.
(13) SY Woo, D Kwon, N Choi, WM Kang, YT Seo, MK Park, JH Bae, BG Park, JH Lee, "Low-power and high-density neuron device for simultaneous processing of excitatory and inhibitory signals in neuromorphic systems," IEEE Access, vol.8, p.202639, 2020.
(12) ST Lee, S Lim, JH Bae, D Kwon, HS Kim, BG Park, JH Lee, "Pruning for hardware-based deep spiking neural networks using gated schottky diode as synaptic devices," Journal of Nanoscience and Nanotechnology, vol.20, no.11 pp.6603-6608, 2020.
(11) JH Bae⫮, D Kwon⫮, N Jeon, S Cheema, AJ Tan, C Hu, S Salahuddin,(⫮Co-first authors) "Highly scaled, high endurance, Ω-gate, nanowire ferroelectric FET memory transistors," IEEE Electron Device Letters, vol.41, no.11, pp.1637-1640, 2020.
(10) D Kwon, S Lim, JH Bae, ST Lee, H Kim, YT Seo, S Oh, J Kim, K Yeom, BG Park, JH Lee, "On-chip training spiking neural networks using approximated backpropagation with analog synaptic devices," Frontiers in neuroscience, vol.14, p.423, 2020.
(9) ST Lee, S Lim, N Choi, JH Bae, D Kwon, HS Kim, BG Park, JH Lee, "Effect of Word-Line Bias on Linearity of Multi-Level Conductance Steps for Multi-Layer Neural Networks Based on NAND Flash Cells," Journal of Nanoscience and Nanotechnology, vol.20, no.7, pp.4138-4142, 2020.
(8) YT Seo, MK Park, JH Bae, BG Park, JH Lee, "Implementation of synaptic device using various high-K gate dielectric stacks," Journal of Nanoscience and Nanotechnology, vol.20, no.7, pp.4138-4142, 2020.
(7) AJ Tan, M Pešić, L Larcher, YH Liao, LC Wang, JH Bae, C Hu, S Salahuddin* "Hot electrons as the dominant source of degradation for sub-5nm HZO FeFETs," 2020 IEEE Symposium on VLSI Technology, 2020.
(6) K Lee⫮, JH Bae⫮, S Kim, JH Lee, BG Park, D Kwon,(⫮Co-first authors) "Ferroelectric-gate field-effect transistor memory with recessed channel," IEEE Electron Device Letters, vol.41, no.8, pp.1201-1204, 2020.
(5) SY Woo, KB Choi, J Kim, WM Kang, CH Kim, YT Seo, JH Bae, BG Park, JH Lee*, "Implementation of homeostasis functionality in neuron circuit using double-gate device for spiking neural network," Solid-State Electronics, vol.165, p.107741, 2020.
(4) J Kim, CH Kim, SY Woo, WM Kang, YT Seo, S Lee, S Oh, JH Bae, BG Park, JH Lee*, "Initial synaptic weight distribution for fast learning speed and high recognition rate in STDP-based spiking neural network," Solid-State Electronics, vol.165, p107742, 2020.
(3) H Kim, JH Bae, S Lim, ST Lee, YT Seo, D Kwon, BG Park, JH Lee, "Efficient precise weight tuning protocol considering variation of the synaptic devices and target accuracy," Neurocomputing, vol.378, pp.189-196, 2020.
(2) W Shin, G Jung, S Hong, Y Jeong, J Park, D Kim, D Jang, D Kwon, JH Bae, BG Park, JH Lee*, "Proposition of deposition and bias conditions for optimal signal-to-noise-ratio in resistor-and FET-type gas sensors," Nanoscale, vol.12, no.38, pp.19768-19775, 2020.
(1) Y Hong, M Wu, JH Bae, S Hong, Y Jeong, D Jang, JS Kim, CS Hwang, BG Park, JH Lee*, "A new sensing mechanism of Si FET-based gas sensor using pre-bias," Sensors and Actuators B: Chemical, vol.302, p.127147, 2020.
2019
(1) JH Bae, S Lim, D Kwon, ST Lee, H Kim, JH Lee*, "Gated Schottky Diode-Type Synaptic Device with a Field-Plate Structure to Reduce the Forward Current," Journal of Nanoscience and Nanotechnology, vol.19, no.10, pp.6135-6138, 2019.
(2) JH Bae⫮, JW Back⫮, MW Kwon, JH Seo, K Yoo, SY Woo, K Park, BG Park, JH Lee*,(⫮Co-first authors) "Characterization of a capacitorless DRAM cell for cryogenic memory applications," IEEE Electron Device Letters, vol.40, no.10, pp.1614-1617, 2019. (Highlighted - Editor's Pick)
(3) JH Bae, S Lim, D Kwon, JH Eum, ST Lee, H Kim, BG Park, JH Lee*, "Near-linear potentiation mechanism of gated Schottky diode as a synaptic device," IEEE Journal of the Electron Device Society, vol.7, pp.335-343, 2019.
(4) JH Bae, H Kim, D Kwon, S Lim, ST Lee, BG Park, JH Lee*, "Reconfigurable field-effect transistor as a synaptic device for XNOR binary neural network," IEEE Electron Device Letters, vol.40, no.4, pp.624-627, 2019. (Highlighted - Editor's Pick)
(5) MK Park, HN Yoo, YT Seo, SY Woo, JH Bae, BG Park, JH Lee*, "Field effect transistor-type devices using high-κ gate insulator stacks for neuromorphic applications," ACS Applied Electronic Materials, vol.2, no.2, pp.323-328, 2019
(6) ST Lee, H Kim, JH Bae, H Yoo, NY Choi, D Kwon, S Lim, BG Park, JH Lee*, "High-density and highly-reliable binary neural networks using NAND flash memory cells as synaptic devices," 2019 IEEE International Electron Devices Meeting (IEDM), pp.38.4.1-38.4.4, 2019.
(7) S Hong, Y Hong, Y Jeong, G Jung, W Shin, J Park, JK Lee, D Jang, JH Bae, JH Lee*, "Improved CO gas detection of Si MOSFET gas sensor with catalytic Pt decoration and pre-bias effect," Sensors and Actuators B: Chemical, vol.300, p.127040, 2019.
(8) S Lim, JH Bae, JH Eum, S Lee, CH Kim, D Kwon, BG Park, JH Lee*, "Adaptive learning rule for hardware-based deep neural networks using electronic synapse devices," Neural Computing and Applications, vol.31, pp.8101-8116, 2019.
(9) ST Lee, S Lim, NY Choi, JH Bae, D Kwon, BG Park, JH Lee*, "Operation scheme of multi-layer neural networks using NAND flash memory as high-density synaptic devices," IEEE Journal of the Electron Devices Society, vol.7, pp.1085-1093, 2019.
(10) TBU...