Prof. Jong-Ho Bae and his team
Prof. Bae joined Yonsei Univ. in 2025 spring and is currently conducting research (projects) with 9 graduate students in his team.
The research topic of his team is mostly about next-generation semiconductor devices and technologies including design, fabrication, analysis and modeling. Research is mainly aimed at applying new semiconductor devices/circuits to existing logic/memory/display applications and next-generation computing systems (e.g. processing-in-memory system).
We are looking for graduate students and researchers who will enjoy research together. (e-mail: jbae@yonsei.ac.kr)
It is sufficient if some of the conditions below are met:
- I don't hate studying,
- Studying semiconductor materials and devices is fun,
- I want to make(fabricate) a semiconductor device,
- I want to study with Prof. Bae (đ).
Research by graduate students consists of the following four steps:
(1) investigation of device performance required for each application,
(2) design a new device/circuit suitable for it,
(3) design, development of fabrication process and fabrication of the device/circuit,
(4) analysis and modeling of fabricated devices, and optimization.
Below are specific examples of the steps (2) to (4) that most students wonder about.
Structure (Mesa, Fin, Nanowire, etc.)
Device Design (Junction, Structure, etc.)
Silicon Transistors / Thin-Film Transistors (TFTs)
Charge Trap Memory / Ferroelectric Field-Effect Transistors (FeFETs)
CMOS Circuits Utilizing a New Device Concept
Related Sites : Bio IT Fab, SNU-ISRC, K-Fab, ETRI, NNFC, IDEC, KANC, Â etc.
Semiconductor Device - Defect Analysis
- DC/Transient I-V, Multi-Frequency C-V, Transient Response Analysis (I-t, C-t, etc.),
 Low Frequency Noise (LFN), Optoelectronic/Thermoelectronic AnalysisÂ
Physics-Based Operating Mechanism Analysis
- Conduction Mechanism, Reliability, Yield, etc.
Device Simulation / Modeling
- TCAD & SPICE (DC/Transient, Mixed-Mode, etc.)
- Neural Network Based Device Modeling (NN-Sim.)
- Other Methods (DC I-V, C-V, MFCV, Gp methods, C-t, DLTS, etc...)
Memory
- Extremely Scaled DRAM (2T0C DRAM, 3D Integration, etc.)
- Stacked FLASH (3D integration of CTF, FeFET and other new memories)
Processing-In Memory (PIM)
- AND/NOR/NAND Memory Array Architecture Based PIM
Display
- Thin-Film-Transistors for Pixel Operation
- Display Devices & Circuits (TFT-Based)
Other Semiconductor Devices (Next-Gen. (New) Devices)
(Capacitorless DRAM, Cryogenic Memory, Gated Diode, IGBT, etc.)