Research Interests

Our research interests include: High-speed and high-resolution data converters, all-digital phase-locked loop (PLL), wireless(RF/mm-Wave)/wireline transceivers, digital signal processing (DSP), AI-assisted analog/mixed-signal design automation, computer-aided design (CAD) tools, analog/mixed-signal/bio-inspired computing, micro-unmanned vehicles, ASICs for focused ultrasound applications.

Integrated Circuits and Systems

High-Performance Data Converters

High-speed, high-resolution DACs [CICC 2022]
1. 12-bit 1GS/s hybrid DAC [VLSI 2014] [JSSC 2015]
  - DSM-assisted element mismatch calibration.
  - Achieved 8GS/s digital delta-sigma modulator (lowpass) via proposed unroll and pipeline technique.
2. 12-bit 2GS/s hybrid DAC [ISSCC 2016] [JSSC 2016]
  - Extended the bandwidth of a hybrid DAC via proposed in-band noise cancellation for the delta-sigma shaped noise.
  - Proposed pulsed-error pre-distortion tackles challenges on amplitude and timing errors of high-speed DACs.
3. 16-bit 12GS/s hybrid DAC [ISSCC 2018] [JSSC2018]
  - Achieved 12GS/s multi-mode delta-sigma modulator (bandpass) via proposed successive pipelined technique.
  - Maximized the DAC linearization capability (close to Nyquist frequency) via inverse-Sinc shaped digital pre-distortion.

Stochastic ADCs
1. Fully synthesizable stochastic TDC in 12nm FinFET [DAC 2022]
2. 1-10GS/s, 8-10bit stochastic time-based ADCs [CICC 2023]
Power-efficient, reconfigurable, high-dynamic-range ADCs
1. All digital high-resolution(>12bit) VCO-based ADC.
2. Continuous-time delta-sigma ADC with reconfigurable STF.
High-speed time-based ADCs
1. >100GS/s ADC with reduced number of time-interleaving channels
2. Apply time-domain signal processing to enhance the ADC performance

Radio Frequency (RF) and Millimeter-Wave Transceivers

Time-approximation filter (TAF) [RFIC workshop 2022]
1. TAF for direct RF transmitter [VLSI 2019] [JSSC 2021]
  - Achieved embedded bandpass filtering via digitally modulating the LO signal, leading to low-cost and highly flexible RF filter.
  - Amplitude-varying impulse response of an analog FIR filter is approximated by a constant-amplitude (digital-like) waveform.
2. SAW-less transmitter enabled by tri-level TAF and multi-mode noise shaping technique [ISSCC 2020]
  - Tri-level TAF enhance the TAF performance in terms of flexibility and stop-band attenuation.
  - Co-design of multi-mode delta-sigma modulator and tri-level TAF.
3. TAF (AMS FIR filter) synthesis [ASP-DAC 2022]
  - coordinate-descent-based derivation for optimal TAF's impulse response
  - NN-based layout-aware circuit design automation

Millimeter-wave transmitter/receiver with TAF
1. TAF receiver with non-uniform sample technique [RFIC 2022] [JSSC 2023]
2. TAF transmitter leveraging digital power amplifier

Digital power amplifier with TAF
DAC-based wireless/wireline transmitter
Non-uniform signal processing / continuous-time DSP

Low-Spur, Low-Jitter Digital PLL

Ring-based PLL
1. MDLL with embedded time-to-digital (TDC) converter [ISSCC 2021] [JSSC 2021]
  - background two-point digital-to-time (DTC) calibration.
  - dithered TDC and adaptive comb-filter-assisted dither noise cancellation.
2. Ultra low-spur MDLL enabled by high-precision DTC [ISSCC 2023] [JSSC 2023]
3. Fully synthesizable PLL.
Millimeter-wave sub-sampling PLL
DSP-enabled clock/LO generation
High-performance phase modulation

Computer-Aided Design Tool

Analog/Mixed-Signal (AMS) Design Automation

AI-assisted AMS circuit modeling and design automation [ERI], [ASP-DAC 2022]
1. ANN-based modeling and searching from know-good designs. [GOMAC2019]
2. Bayesian optimization assisted sampling and transfer learning. [ICCAD 2020]
3. ANN structure optimization for AMS circuit modeling. [DAC 2021]
4. Silicon proof of AMS modeling and design flow. [ICCAD 2021]
5. Sizing and layout flows for ADC/DAC/PLL/TAF. [ASP-DAC 2022]
Expediting AMS circuit validation (simulation).
1. CEPA: CNN-based early performance assertion for AMS circuit simulations. [ICCAD 2020]
2. CEPA 2.0 (coming soon...)
Fully synthesizable AMS/RF circuits using digital standard cells
1. stochastic time-to-digital converter [DAC 2022]
2. stochastic TDC [VLSI 2024]

Advanced Computing

Micro-Unmanned Aerial Vehicles

Memristor-based computing platform.
1. Integrate/co-design ASICs, control algorithms, and the high-performance memristor devices from Prof. Wei Wu's group at USC (https://wugroup.usc.edu/) . [CICC 2023]
2. Low-power, low-latency interfaces between memristor and DSP unit. [CICC 2023]
Ultra low-power sensor fusion
1. Power and area efficient high-order Kalman filter. [ESSCIRC 2023]
2. Energy-efficient analog to digital conversion.
Control Algorithms
1. Low-power, low-latency, and robust digital control.
2. Collaboration with Prof. Quan Nguyen's group at USC (https://sites.usc.edu/quann/

Boolean Satisfiability (SAT) Problem

Stochastic analog solver for difficult (large clause/variable ratio) SAT problems. [VLSI 2024]

Biomedical Interfaces

Neural Stimulation

Low-power ASICs for focused ultrasound
1. High-resolution DACs
2. High-resolution DTCs
3. Highly linear transducer drivers
4. Collaboration with Prof. Qifa Zhou's group at USC (https://ibt.usc.edu/research-faculty/qifa-zhou-phd/)
Advanced packaging for massive beamforming
Signal processing techniques for Bio stimulations

Research Interests

Integrated Circuits and Systems

High-Performance Data Converters

High-speed, high-resolution DACs [CICC 2022]

Stochastic ADCs

Power-efficient, reconfigurable, high-dynamic-range ADCs

High-speed time-based ADCs

Radio Frequency (RF) and Millimeter-Wave Transceivers

Time-approximation filter (TAF) [RFIC workshop 2022]

Millimeter-wave transmitter/receiver with TAF

Digital power amplifier with TAF

DAC-based wireless/wireline transmitter

Non-uniform signal processing / continuous-time DSP

Low-Spur, Low-Jitter Digital PLL

Ring-based PLL

Millimeter-wave sub-sampling PLL

DSP-enabled clock/LO generation

High-performance phase modulation

Computer-Aided Design Tool

Analog/Mixed-Signal (AMS) Design Automation

AI-assisted AMS circuit modeling and design automation [ERI], [ASP-DAC 2022]

Expediting AMS circuit validation (simulation).

Fully synthesizable AMS/RF circuits using digital standard cells

Advanced Computing

Micro-Unmanned Aerial Vehicles

Memristor-based computing platform.

Ultra low-power sensor fusion

Control Algorithms

Boolean Satisfiability (SAT) Problem

Stochastic analog solver for difficult (large clause/variable ratio) SAT problems. [VLSI 2024]

Biomedical Interfaces

Neural Stimulation

Low-power ASICs for focused ultrasound

Advanced packaging for massive beamforming

Signal processing techniques for Bio stimulations

Posters