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Our research interests include: High-speed and high-resolution data converters, all-digital phase-locked loop (PLL), wireless(RF/mm-Wave)/wireline transceivers, digital signal processing (DSP), AI-assisted analog/mixed-signal design automation, computer-aided design (CAD) tools, analog/mixed-signal/bio-inspired computing, micro-unmanned vehicles, ASICs for focused ultrasound applications.
Our research interests include: High-speed and high-resolution data converters, all-digital phase-locked loop (PLL), wireless(RF/mm-Wave)/wireline transceivers, digital signal processing (DSP), AI-assisted analog/mixed-signal design automation, computer-aided design (CAD) tools, analog/mixed-signal/bio-inspired computing, micro-unmanned vehicles, ASICs for focused ultrasound applications.
Integrated Circuits and Systems
Integrated Circuits and Systems
High-Performance Data Converters
High-Performance Data Converters
- Blocker-tolerant wideband ADCs
Continuous-time pipelined ADC with enhanced anti-aliasing and quantization
Continuous-time ADC with reconfigurable high-order STF
Non-uniform ADC
12-bit 1GS/s hybrid DAC [VLSI 2014] [JSSC 2015]
DSM-assisted element mismatch calibration.
Achieved 8GS/s digital delta-sigma modulator (lowpass) via proposed unroll and pipeline technique.
12-bit 2GS/s hybrid DAC [ISSCC 2016] [JSSC 2016]
Extended the bandwidth of a hybrid DAC via proposed in-band noise cancellation for the delta-sigma shaped noise.
Proposed pulsed-error pre-distortion tackles challenges on amplitude and timing errors of high-speed DACs.
16-bit 12GS/s hybrid DAC [ISSCC 2018] [JSSC2018]
Achieved 12GS/s multi-mode delta-sigma modulator (bandpass) via proposed successive pipelined technique.
Maximized the DAC linearization capability (close to Nyquist frequency) via inverse-Sinc shaped digital pre-distortion.
- Stochastic ADCs
- Power-efficient, reconfigurable, high-dynamic-range ADCs
All digital high-resolution(>12bit) VCO-based ADC.
Continuous-time delta-sigma ADC with reconfigurable STF.
- High-speed time-based ADCs
>100GS/s ADC with reduced number of time-interleaving channels
Apply time-domain signal processing to enhance the ADC performance
Radio Frequency (RF) and Millimeter-Wave Transceivers
Radio Frequency (RF) and Millimeter-Wave Transceivers
- Time-approximation filter (TAF) [RFIC workshop 2022]
TAF for direct RF transmitter [VLSI 2019] [JSSC 2021]
Achieved embedded bandpass filtering via digitally modulating the LO signal, leading to low-cost and highly flexible RF filter.
Amplitude-varying impulse response of an analog FIR filter is approximated by a constant-amplitude (digital-like) waveform.
SAW-less transmitter enabled by tri-level TAF and multi-mode noise shaping technique [ISSCC 2020]
Tri-level TAF enhance the TAF performance in terms of flexibility and stop-band attenuation.
Co-design of multi-mode delta-sigma modulator and tri-level TAF.
TAF (AMS FIR filter) synthesis [ASP-DAC 2022]
coordinate-descent-based derivation for optimal TAF's impulse response
NN-based layout-aware circuit design automation
- Millimeter-wave transmitter/receiver with TAF
- Digital power amplifier with hybrid DAC [ISSCC 2025]
- DAC-based wireless/wireline transmitter
- Non-uniform signal processing / continuous-time DSP
Low-Spur, Low-Jitter Digital PLL
Low-Spur, Low-Jitter Digital PLL
- Ring-based PLL
MDLL with embedded time-to-digital (TDC) converter [ISSCC 2021] [JSSC 2021]
background two-point digital-to-time (DTC) calibration.
dithered TDC and adaptive comb-filter-assisted dither noise cancellation.
Ultra low-spur MDLL enabled by high-precision DTC [ISSCC 2023] [JSSC 2023]
Fully synthesizable PLL.
- Millimeter-wave sub-sampling PLL
- DSP-enabled clock/LO generation
- High-performance phase modulation
Advanced Computing
Advanced Computing
Boolean Satisfiability (SAT) Problem
Boolean Satisfiability (SAT) Problem
- Stochastic analog solver for difficult (large clause/variable ratio) SAT problems. [VLSI 2024]
- Hybrid accelerators for difficult SAT problems
- Heterogeneous accelerators for ultra large-scale SAT problems
Quantum Computer
Quantum Computer
- Control and readout IC for large-scale Quantum Computers
- Cost-efficient error correction algorithms and associated circuit implementation
- High-fidelity multiplexing schemes and circuit implementation
AI for Wireline Transceivers
AI for Wireline Transceivers
- AI-assisted wireline transceiver optimization
- Compact and energy-efficient accelerators
Micro-Unmanned Aerial Vehicles
Micro-Unmanned Aerial Vehicles
- Memristor-based computing platform.
Integrate/co-design ASICs, control algorithms, and the high-performance memristor devices from Prof. Wei Wu's group at USC (https://wugroup.usc.edu/) . [CICC 2023]
Low-power, low-latency interfaces between memristor and DSP unit. [CICC 2023]
- Ultra low-power sensor fusion
Power and area efficient high-order Kalman filter. [ESSCIRC 2023]
Energy-efficient analog to digital conversion.
- Control Algorithms
Low-power, low-latency, and robust digital control.
Collaboration with Prof. Quan Nguyen's group at USC (https://sites.usc.edu/quann/
Computer-Aided Design Tool
Computer-Aided Design Tool
Analog/Mixed-Signal (AMS) Design Automation
Analog/Mixed-Signal (AMS) Design Automation
ANN-based modeling and searching from know-good designs. [GOMAC2019]
Bayesian optimization assisted sampling and transfer learning. [ICCAD 2020]
ANN structure optimization for AMS circuit modeling. [DAC 2021]
Silicon proof of AMS modeling and design flow. [ICCAD 2021]
Sizing and layout flows for ADC/DAC/PLL/TAF. [ASP-DAC 2022]
- Expediting AMS circuit validation (simulation).
CEPA: CNN-based early performance assertion for AMS circuit simulations. [ICCAD 2020]
CEPA 2.0 (coming soon...)
- Fully synthesizable AMS/RF circuits using digital standard cells
stochastic time-to-digital converter [DAC 2022]
stochastic TDC [VLSI 2024], [JSSC 2025]
Biomedical Interfaces
Biomedical Interfaces
Neural Stimulation
Neural Stimulation
- Low-power ASICs for focused ultrasound
High-resolution DACs
High-resolution DTCs
Highly linear transducer drivers
- Advanced packaging for massive beamforming
- Signal processing techniques for Bio stimulations
Posters
Posters
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