Satta ka khel to chalega.......saarkarin aayegi, jayegi.... partiya banegi bigrdegi... par yeah desh rahena chahiye......eshh desh ki loktantra amar rehna chahiye.....

The game of politics will be there always. Different governments will come and go. Political parties will be made and destroyed. But the country must remain. The democracy of this country must be immortal.

Shri. Atal Bihari Vajpayee (Ex PM of India) ~~~~ Click to listen

Hello, welcome to my home page. I have recently moved from IIT Ropar to IIT Hyderabad.

  1. Assistant Professor: Department of CSE, Indian Institute of Technology Hyderabad, Telangana, India from December 2022.

  2. Former Assistant Professor: Department of CSE, Indian Institute of Technology Ropar, Punjab, India -- June 2018 to Nov 2022.

  3. Former Assistant Professor: Department of CSE, Indian Institute of Information Technology Guwahati, Assam, India -- July 2015 to June 2018.

  4. PhD from Indian Institute of Technology Guwahati -- January 2016.

  5. M.Tech in Computer Science and Engineering, from Indian Institute of Technology Guwahati, Assam, India -- July 2010.

  6. MSc in Computer Science from Assam University Silchar, Assam, India -- June 2007.

  1. [NEW] Paper titled, "ACPC: Covert Channel Attack on Last Level Cache using Dynamic Cache Partitioning", by Jaspinder et al., got accepted in the ISQED 2023.

  2. [NEW] Paper titled, "TPPD: Targeted Pseudo Partitioning based Defence for Cross-Core Covert Channel Attacks", by Jaspinder et al. got accepted in the Journal of System Architecture.

  3. [NEW] Paper titled, "Variation Aware Power Management for GPU Memories" by Divyansh et al., got accepted in Elsevier MICPRO.

  4. [NEW] Paper titled, "A Case for Amplifying Row Hammer Attacks via Cell-Coupling in DRAM Devices" by Kaustav et al, got accepted in ACM MEMSYS 2022.

  5. [NEW] Paper titled, "Hybrid Refresh: Improving DRAM Performance by Handling Weak Rows Smartly" by Samiksha et al, got accepted in ACM MEMSYS 2022.

  6. [New] Paper titled, ''BHT-NoC: Blaming Hardware Trojans in NoC Routers", by Bharat et al., got accepted for joint publication at NOCS 2022 and IEEE Design and Test journal [Click Here for early access.]

  7. [New] Paper titled, ''WinDRAM: Weak Rows as in-DRAM Cache", by Sudershan et al., got accepted in the Journal of Concurrency and Computation: Practice and Experience.

  8. [New] Bharat (MTech CSE 2022 batch) got an offer from Intel

  9. [New] Sudershan (MTech CSE 2021 batch) received Institute Silver Medal. --Joined Intel.

  10. [New] Manaal (MTech CSE 2021 batch) has been selected for Sunny Oberoi Best MTech Thesis Award by IIT Ropar. Congratulations to Manaal!!! --Joined Qualcomm.

  11. [NEW] Paper titled, "Process Variation Aware DRAM-Cache Resizing", by Bindu et al. got accepted in the Journal of System Architecture.

  12. [NEW] Paper titled, "MAPCP: Memory Access Pattern Classifying Prefetcher" by Manaal et al, got accepted in ACM MEMSYS 2021.

  13. [NEW] Paper titled, "A Survey on Cache Timing Channel Attacks for Multicore Processors " by Jaspinder et al., got accepted in Journal of Hardware and Systems Security. A read-only link is available: https://rdcu.be/ckXf2

  14. Paper titled, "Towards Enhanced System Efficiency While Mitigating Row Hammer" by Kaustav et al., got accepted in ACM TACO.

  15. Paper titled, "Exploiting Secrets by Leveraging Dynamic Cache Partitioning of Last Level Cache " by Anuraag et al., got accepted in DATE 2021 -- Nominated for best paper award.

Research Interest

Major Research Area: Computer Architecture

My current research focus is on Chip Multiprocessors (CMP) specifically the issues of Last Level Cache (LLC), Network on Chip (NoC) and DRAM Caches. I am currently working on the topics mentioned below:

  • Hardware security of cache memories in CMPs.

  • Performance enhancement of LLCs in Tiled Based CMP (TCMP).

  • Minimizing the on-chip communication latency in TCMP.

  • Energy consumption and temperature optimization of LLC, NoC and DRAM cache memories.

  • Smart replacement policies for different NUCA (Non Uniform Cache Access) based cache memory architectures.

Simulation tools required in this domain are: gem5, Booksim, McPAT, CACTI, HotSpot, Garnet and Orion etc.

For more details about my research: Click here . For my updated CV: Click here.

Openings

  1. PhD positions are available in the area of Computer Architecture (especially in memory technologies).

  2. Limited internship positions are available. Please check my research interest before applying. A good programming skill (C/C++/Python) is required.

Teaching

  • Click Here to see my detail teaching experience.

Other Activities:

I am an adventure loving person. I like cycling, trekking, road trip etc. It is my dream to travel all over India with my cycle and motorcycle :) . I also love to play badminton, football, and cricket.

Click in the image to see my recent activities.




Contact Details:

IIT Hyderabad:

shirshendu[at]cse.iith.ac.in


IIT Ropar:

shirshendu[at]iitrpr.ac.in