Satta ka khel to chalega.......saarkarin aayegi, jayegi.... partiya banegi bigrdegi... par yeah desh rahena chahiye......eshh desh ki loktantra amar rehna chahiye.....

The game of politics will be there always. Different governments will come and go. Political parties will be made and destroyed. But the country must remain. The democracy of this country must be immortal.

Shri. Atal Bihari Vajpayee (Ex PM of India) ~~~~ Click to listen

Hello, welcome to my home page. I am an Assistant Professor in the Department of CSE, Indian Institute of Technology Ropar, Punjab, India. My academic details and experiences are as follows:

  1. Assistant Professor: Department of CSE, Indian Institute of Technology Ropar, Punjab from June 2018.

  2. Ex-Assistant Professor at Indian Institute of Information Technology Guwahati, Assam, India -- July 2015 to June 2018.

  3. PhD from Indian Institute of Technology Guwahati -- January 2016.

  4. M.Tech in Computer Science and Engineering, from Indian Institute of Technology Guwahati, Assam, India -- July 2010.

  5. MSc in Computer Science from Assam University Silchar, Assam, India -- June 2007.

  1. [NEW] Paper titled, "Process Variation Aware DRAM-Cache Resizing", by Bindu et al. got accepted in the Journal of System Architecture.

  2. [NEW] Paper titled, "MAPCP: Memory Access Pattern Classifying Prefetcher" by Manaal et al, got accepted in ACM MEMSYS 2021.

  3. [NEW] Paper titled, "Efficient On-Chip Communication for Neuromorphic Systems" by Shobhit et al., got accepted in ScalCom 2021.

  4. [NEW] Paper titled, "A Survey on Cache Timing Channel Attacks for Multicore Processors " by Jaspinder et al., got accepted in Journal of Hardware and Systems Security. A read-only link is available: https://rdcu.be/ckXf2

  5. Paper titled, "Towards Enhanced System Efficiency While Mitigating Row Hammer" by Kaustav et al., got accepted in ACM TACO.

  6. Paper titled, "Exploiting Secrets by Leveraging Dynamic Cache Partitioning of Last Level Cache " by Anuraag et al., got accepted in DATE 2021 -- Nominated for best paper award.

  7. Paper titled, "A Fairness Conscious Cache Replacement Policy for Last Level Cache" by Kousik et al., got accepted in DATE 2021.

  8. Paper titled, "Towards Row Sensitive DRAM Refresh through Retention Awareness " by Tanmay et al., got accepted in ISQED 2021.

  9. Paper titled, "Efficient Cache Resizing Policy for DRAM-based LLCs in ChipMultiprocessors" by Bindu et al., got accepted in the Journal of System Architecture.

Research Interest

Major Research Area: Computer Architecture

My current research focus is on Chip Multiprocessors (CMP) specifically the issues of Last Level Cache (LLC), Network on Chip (NoC) and DRAM Caches. I am currently working on the topics mentioned below:

  • Hardware security of cache memories in CMPs.

  • Performance enhancement of LLCs in Tiled Based CMP (TCMP).

  • Minimizing the on-chip communication latency in TCMP.

  • Energy consumption and temperature optimization of LLC, NoC and DRAM cache memories.

  • Smart replacement policies for different NUCA (Non Uniform Cache Access) based cache memory architectures.

Simulation tools required in this domain are: gem5, Booksim, McPAT, CACTI, HotSpot, Garnet and Orion etc.

Click here for more detail about my research.

Openings

  1. PhD positions are available in the area of Computer Architecture (especially in memory technologies).

  2. Limited internship positions are available. Please check my research interest before applying. A good programming skill (C/C++/Python) is required.

Teaching

  • Click Here to see my detail teaching experience.

Other Activities:

I am an adventure loving person. I like cycling, trekking, road trip etc. It is my dream to travel all over India with my cycle and motorcycle :) . I also love to play badminton, football, and cricket.

Click in the image to see my recent activities.




Contact Details:

shirshendu[at]iitrpr.ac.in

Room No: 303, Department of CSE, IIT Ropar (Permanent Building), Ropar. Punjab, 140001