(On-going) Development of Ternary 3T IGZO-FeFET Processing-In-Memory Arrays for Large Language Model Acceleration

(On-going) Development of FeFET/FTJ–Based Device–Driving Circuit–Packaging Co-Integration Technology for Transformer Acceleration

(On-going) Research on High-efficiency Analog AI Computing for Large-scale DNN Models

(On-going) Development for Processing Software on AI Semiconductor Devices

Development of circuits and architecture for 2T DRAM-based  low-power and high-performance PIM cells 

Development of neural network simulator for Flash memory based in-memory computing system 

Analog PIM device modeling and framework development based on next-generation memory device

TCAD simulation and device modeling of Flash, DRAM, and other NVM devices

Memory device fabrication, Logic-compatible memory cell layout design

Chip architecture and core design of 3D NAND for AI applications

Thermal analysis of 2.5D memory-GPU integrated system.

PIM simulator development as a benchmarking framework for novel PIM architecture

Novel memory device design and optimization for low-power, accurate analog PIM operation

Macro- and chiplet-level architecture design for fast, energy-efficient PIM system

Co-optimization of PIM device, architecture and algorithms such as LLM