Conference papers
Do Hyun Kim, Hui-Jae Choi, Wonbo Shim, "A Novel Refresh Technique for Capacitor-less DRAM-based Processing-in-Memory", International Conference on Electronics, Information, and Communication (ICEIC), Taipei, 2024.
Chan-Gi Yook, Wonbo Shim, "Low Power Design Method of Split-Gate NOR Flash Memory Device for Compute-in-Memory", International Conference on Electronics, Information, and Communication (ICEIC), Taipei, 2024.
Wonbo Shim, "Leveraging 3D NAND Flash in processing-in-memory for hyper-scale AI models", Nano Convergence Conference, Daejeon, 2024.
Seong Hwan Kong, Hui-Jae Choi, Chan-Gi Yook, and Wonbo Shim, "A Novel 2T0C DRAM Cell Structure and Refresh Technique for Processing-in-memory Applications", the 31st Korean Conference on Semiconductors, Gyeongju, 2024.
Chan-Gi Yook, Seung-won Lee, and Wonbo Shim, "Low-Power Split-Gate NOR Flash Cell Design and Non-Ideality Analysis for Compute-in-Memory", the 31st Korean Conference on Semiconductors, Gyeongju, 2024.
Seung-won Lee, Chan-Gi Yook, Wonbo Shim, "Split Gate NOR Flash Retention Characteristics and On current Analysis by Temperature", Fall Annual Conference of IEIE, Seoul, 2023.
Do Hyun Kim, Changwon Jeon, Wonbo Shim, "Effect of Variation in Channel Hole Profile on the Erase Operation of 3D NAND Flash", Fall Annual Conference of IEIE, Seoul, 2023.
Seong Hwan Kong, Wonbo Shim, “65 nm CMOS 2T0C DRAM based Processing-in-memory”, Summer Annual Conference of IEIE, Jeju, 2023.
Hui-Jae Choi, Wonbo Shim, "Area Analysis of 2T DRAM-based PIM Chip according to Implementation of Refresh Circuit", Summer Annual Conference of IEIE, Jeju, 2023.
Wonbo Shim, “Compute-in-memory Technology for Huge AI Models”, The 38th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Jeju, 2023 (invited).
Seong Hwan Kong, Wonbo Shim, “Effect of Pre-charge Voltage on Retention Characteristics and Accuracy in 65 nm 2T0C DRAM based Compute-In-Memory”, The 38th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Jeju, 2023.
Chan-Gi Yook, Wonbo Shim, “Refresh Methods and Accuracy Evaluation for 2T0C DRAM based Processing-in-memory”, The 38th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Jeju, 2023.
Wonbo Shim, “Compute-in-memory (CIM) for AI Applications based on Nonvolatile Memory Devices”, IEEE International Conference on Nano/Micro Engineered and Molecular Systems (NEMS), Jeju, 2023 (invited).
Wonbo Shim, "3D NAND based Compute-in-memory Technology for Energy-efficient Processing of Huge AI Models", The 17th ROK-USA Forum on Nanotechnology, Seoul, 2023 (invited).
Wonbo Shim, "Development of Benchmarking Framework Simulator for DRAM based In-memory Computing System", Autumn Annual Conference of IEIE, Gwangju, 2022.
Chan-gi Yook, Wonbo Shim, "Development of 2T DRAM based Processing-in-memory Simulation Framework and Evaluation of Inference Accuracy according to Refresh Method", Autumn Annual Conference of IEIE, Gwangju, 2022.
Wonbo Shim, "Nonvolatile Memory based Compute-in-memory (CIM) Technology", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), Busan, 2022 (invited).
Seungwon Cha, Wonbo Shim, “Evaluation of Computing-In-Memory (CIM) Performance Spec Based on Synaptic Array Size Changes using NeuroSim,” Summer Annual Conference of IEIE, Jeju, 2022.
Min-Ki Choi, Wonbo Shim, “SRAM-based PIM chip Optimization by using DNN+NeuroSim Simulator,” Summer Annual Conference of IEIE, Jeju, 2022.
Go-Eun Heo, Wonbo Shim, “Accuracy of RRAM based CIM(Computing-in-Memory) Using DNN NeuroSim,” Summer Annual Conference of IEIE, Jeju, 2022.
Hyeon-Ho Gu, Wonbo Shim, “Hardware specification analysis based on On Resistance of RRAM-based Compute-in-memory system using NeuroSim,” Summer Annual Conference of IEIE, Jeju, 2022.
Jian Meng, Injune Yeo, Wonbo Shim, Li Yang, Deliang Fan, Shimeng Yu, Jae-sun Seo, "Sparse and Robust RRAM-based Efficient In-memory Computing for DNN Inference", IEEE International Reliability Physics Symposium (IRPS), Dallas, Texas, 2022.
Wonbo Shim, “Nonvolatile Memory based Compute-in-memory (CIM) Technology for Energy Efficient Deep Neural Network Accelerator”, the 29th Korean Conference on Semiconductors, Jeongseon, 2022 (invited).
Hyeon-Ho Gu, Wonbo Shim, “Retention characteristics of Multilevel RRAM at Various Temperature and Time”, Autumn Annual Conference of IEIE, Incheon, 2021.
Seong Hwan Kong, Wonbo Shim, “Effect of Read Disturb on Multilevel RRAM with Various Array Size and Read Voltage”, Autumn Annual Conference of IEIE, Incheon, 2021.
Shimeng Yu, Wonbo Shim, Jae Hur, Yuan-Chun Luo, Gihun Choe, Wantong Li, Anni Lu, Xiaochen Peng, “Compute-in-memory: from device innovation to 3D system integration,” IEEE European Solid-State Device Research Conference (ESSDERC) 2021.
Jae Hur, Yuan-Chun Luo, Zheng Wang, Wonbo Shim, Asif Islam Khan, Shimeng Yu, “A technology path for scaling embedded FeRAM to 28nm with 2T1C structure,” IEEE International Memory Workshop (IMW) 2021, virtual.
Wonbo Shim, Jian Meng, Xiaochen Peng, Jae-sun Seo, Shimeng Yu, “Impact of multilevel retention characteristics on RRAM based DNN inference engine,” IEEE International Reliability Physics Symposium (IRPS) 2021, virtual.
Wangxin He, Wonbo Shim, Shihui Yin, Xiaoyu Sun, Deliang Fan, Shimeng Yu, Jae-sun Seo, “Characterization and mitigation of relaxation effects on multi-level RRAM based in-memory computing,” IEEE International Reliability Physics Symposium (IRPS) 2021, virtual.
X. Peng, W. Chakraborty, A. Kaul, W. Shim, M. S. Bakir, S. Datta, S. Yu, “Benchmarking monolithic 3D integration for compute-in-memory accelerators: overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond,” IEEE International Electron Devices Meeting (IEDM) 2020, virtual.
Wonbo Shim, Hongwu Jiang, Xiaochen Peng, Shimeng Yu, “Architectural design of 3D NAND Flash based compute-in-memory for inference engine,” ACM/IEEE International Symposium on Memory Systems (MEMSYS), virtual, Oct, 2020.
Gihun Choe, Wonbo Shim, Jae Hur, Asif Islam Khan, Shimeng Yu, “Impact of random phase distribution in 3D vertical NAND architecture of ferroelectric transistors on in-memory computing,” IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Sep. 2020, virtual.
Wonbo Shim, Yandong Luo, Jae-Sun Seo, Shimeng Yu, “Impact of read disturb on multilevel RRAM based inference engine: experiments and model prediction”, IEEE International Reliability Physics Symposium (IRPS), April 28- May 30, 2020.
Won Bo Shim, Seunghyun Kim, Yoon Kim, Se Hwan Park, Sungjun Kim, Euyhwan Park, and Byung-Gook Park, "Bitline separated gated multi-bit (BS-GMB) SONOS for high density flash memory," IEEE NANO, pp. 7927-, Aug. 2012.
Won Bo Shim, Seunghyun Kim, Do-Bin Kim, and Byung-Gook Park, "Investigation of scaling issues in gated twin-bit (GTB) SONOS NAND flash memory array," International Technical Conference on Circuits/Systems, Computers and Communications, pp. B-W2-03-, Jul. 2012
Sang Wan Kim, Woo Young Choi, Won Bo Shim, Hyungjin Kim, Min-Chul Sun, Hyun Woo Kim, and Byung-Gook Park, "Study on the ambipolar behavior depending on the length of gate-drain overlap," International Technical Conference on Circuits/Systems, Computers and Communications, pp. P-T3-09-, Jul. 2012
Jung Han Lee, Kwon-Chil Kang, Kyung Wan Kim, Won Bo Shim, and Byung-Gook Park, "Investigation of Poly-Silicon Quantum Dot Single Electron Transistor with SONOS Structure," International Conference on Electronics, Information and Communication, pp. 273-274, Feb. 2012
Won Bo Shim, Jung Hoon Lee, Dong Hua Li, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Se Hwan Park, Joo Yun Seo, and Byung-Gook Park, "Design of Gated Twin-Bit (GTB) NAND Flash Memory Considering Gate Induced Drain Leakage (GIDL) Current," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 308-309, Jun. 2011
Joung-Eob Lee, Won Bo Shim, Jang-Gn Yun, Kwon-Chil Kang, Jung Han Lee, Hyungcheol Shin, and Byung-Gook Park, "Single electron transistors (SETs) for reducing Source/Drain resistance and MOS current," International Conference on Solid State Devices and Materials, pp. 788-789, Sep. 2010
Doo-Hyun Kim, Gil Sung Lee, Seongjae Cho, Jung Hoon Lee, Jang-Gn Yun, Dong Hua Li, Yoon Kim, Se Hwan Park, Won Bo Shim, Wandong Kim, and Byung-Gook Park, "Threshold Voltage Roll-off Mechanisms in SONOS Flash Memory in Retention Mode Including Trapped Charge Redistribution Effect," Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 37-40, Jul. 2010
Sang Wan Kim, Garam Kim, Won Bo Shim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Simulation of Retention Characteristics in a Double-Gate and Recessed-Channel 1T DRAM cell with High Reliability," ITC-CSCC, pp. 905-906, Jul. 2010
Seongjae Cho, Yoon Kim, Won Bo Shim, Dong Hua Li, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Highly Scalable Vertical Bandgap-Engineered NAND Flash Memory," Device Research Conference, pp. 265-266, Jun. 2010
Dong Hua Li, Il Han Park, Jang-Gn Yun, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Se Hwan Park, Won Bo Shim, Wandong Kim, Seongjae Cho, and Byung-Gook Park, "Scaling Behaviors of Silicon Nitride Layer for Charge Trapping Memory", AVS 56th International Symposium and Exhibition, San Jose, USA, EM-TuP18, Nov. 8-13, 2009
Seongjae Cho, Yoon Kim, Jang-Gn Yun, Jung Hoon Lee, Won Bo Shim, and Byung-Gook Park, "Dependence of Program and Erase Speeds on Bias Conditions for Fully Depleted Channel of Vertical NAND Flash Memory Devices", 10th Annual Non-Volatile Memory Technology Symposium, Portland, USA, pp.8-2 Oct. 25-28, 2009
Wandong Kim, Il Han Park, Jang-Gn Yun, Jung Hoon Lee, Se-Hwan Park, Yoon Kim, Dong Hua Lee, Seongjae Cho, Doo-Hyun Kim, Gil Sung Lee, Won Bo Shim, Jong-Duk Lee, and Byung-Gook Park, "Impact of Three-dimensional Device Structures on NAND Flash Memory with Inversion Type Source and Drain", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 69-70, June 13-14, 2009.
Won Bo Shim, Il Han Park, Seongjae Cho, Jung Hoon Lee, Jang-Gn Yun, Dong Hua Li, Gil Sung Lee, Doo Hyun Kim, Yoon Kim, Se Hwan Park, Wandong Kim, and Byung-Gook Park, "Device Structure and Operation of Stacked Vertical AND array for High Density Flash Memory", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 79-80, June 13-14, 2009
Doo-Hyun Kim, Yoon Kim, Il Han Park, Jung Hoon Lee, Seongjae Cho, Jang-Gn Yun, Dong Hua Li, Gil Sung Lee, Se Hwan Park, Won Bo Shim and Byung-Gook Park, "Simulation of Retention Characteristics in Double-Gate Structure SONOS Flash Memory with Body Doping Concentration", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 71-72, June 13-14, 2009
Dong Hua Li, Il Han Park, Seongjae Cho, Jang-Gn Yun, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung lee, Yoon Kim, Se Hwan Park, Won Bo Shim, and Byung-Gook Park, "Study of Tunneling Oxides Fabricated by Different Processes and Their Effects on Memory Characteristics of SONOS Capacitors", E-MRS 2009 Spring Meeting, Congress Center, Strasbourg, France, I15-11, June 8-12, 2009.
Dong Hua Li, Il Han Park, Seongjae Cho, Jang-Gn Yun, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung lee, Yoon Kim, Se Hwan Park, Won Bo Shim, Wandong Kim, and Byung-Gook Park, "Effects of Equivalent Oxide Thickness on Bandgap-Engineered SONOS Flash Memory", 2009 IEEE Nanotechnology Materilas and Devices Conference, Traverse City, Michigan, USA, pp.255-258, June 2-5, 2009
Dong Hua Li, Seongjae Cho, Il Han Park, Jang-Gn Yun, Jung Hoon Lee, Gil Sung Lee, Doo-Hyun Kim, Yoon Kim, Se-Hwan Park, Won Bo Shim, Jong Duk Lee, and Byung-Gook Park, "Charge Trapping Characteristics of SONOS Capacitors with Control Gates of Different Work Functions during Program/Erase Operation," 2008 Materials Research Society, Boston, USA, A11.1, December 1-5, 2008
Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Dong Hua Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Se-Hwan Park, Won Bo Shim, Wandong Kim, Jong Duk Lee and Byung-Gook Park, "Stacked Vertical Channel (SVC) NOR Flash Memory," The 2nd IEEE Nanotechnology Materials and Devices Conference, Kyoto, Japan, pp.151, October 20-22, 2008
Gil Sung Lee, Doo Hyun Kim, Il Han Park, Jung Hoon Lee, Seongjae Cho, Jang-Gn Yun, Dong Hua Li, Yoon Kim, Se Hwan Park, Won Bo Shim, Jong Duk Lee and Byung-Gook Park, " Fabrication Process of Cone SONOS Memory Structure," 2008 The 9th International Conference on Electronics, Information, and Communication, Tashkent, Uzbekistan, pp.1017-1020, June 24-27, 2008
Yoon Kim, Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Se-Hwan Park, Dong Hua Lee, Doo-Hyun Kim, Gil Sung Lee, Won Bo Shim, Jong-Duk Lee, and Byung-Gook Park, " Locally-Separated Vertical Channel SONOS Flash Memory (LSVC SONOS) for Multi-Storage and Multi-Level Operation," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-33, June 15-16, 2008
Jang-Gn Yun, Il Han Park, Jung Hoon Lee, Se-Hwan Park, Yoon Kim, Dong Hua Lee, Seongjae Cho, Doo-Hyun Kim, Gil Sung Lee, Won Bo Shim, Jong-Duk Lee, and Byung-Gook Park, " Vertical Channel Double Split-Gate (VCDSG) Flash Memory," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-29, June 15-16, 2008
Gil Sung Lee, Il Han Park, Seongjae Cho, Jang-Gn Yun, Jung Hoon Lee, Dong Hua Li, Doo Hyun Kim, Yoon Kim, Se Hwan Park, Won Bo Shim, Jong Duk Lee and Byung-Gook Park, " Memory characteristics improvement encouraged by the shape of narrow drain in cone SONOS memory structure," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-30, June 15-16, 2008
Seunghyun Kim, Myung-Hyun Baek, Won Bo Shim, and Byung-Gook Park, "Investigation of gated multi bit array (GMB) with arch type cut off gate for 3D NAND flash memory," NANO Korea, pp. -, Jul. 2015
Won Bo Shim, Se Hwan Park, Jung Hoon Lee, Dong Hua Li, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Wandong Kim, and Byung-Gook Park, "Investigation of Inter-gate Leakage Current due to Insulator Thickness in Stacked NAND Flash Memory", Autumn Annual Conference of IEIE, pp. 32-33, Nov. 2010
Dong Hua Li, Sunghun Jung, Se Hwan Park, Won Bo Shim, and Byung-Gook Park, "Shallow-Trap-Assisted PGM/ERS Behaviors for Charge Trap Flash," NANO Korea, pp. 1018-1018, Aug. 2010
Sang Wan Kim, Garam Kim, Won Bo Shim, Min-Chul Sun, Hyun Woo Kim, Dae Woong Kwon, Jisoo Chang, Jang Hyun Kim, Euyhwan Park, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "1T DRAM Cell with Twin Gates and Recessed Channel," Summer Annual Conference of IEIE, pp. 723-724, Jun. 2010
Jung Han Lee, Won Bo Shim, Kwon-Chil Kang, Joung-Eob Lee, Kyung Wan Kim, and Byung-Gook Park, "Dual-Gate Single Electron Transistor with SONOS Structure Able to Control Oscillation Phase," Summer Annual Conference of IEIE, pp. 667-668, Jun. 2010
Jung Hoon Lee, Wandong Kim, Gil Sung Lee, Won Bo Shim, and Byung-Gook Park, "Fabrication of Arch SONOS Flash Memory Array," Summer Annual Conference of IEIE, pp. 583-584, Jun. 2010
Wandong Kim, Dae Woong Kwon, Seongjae Cho, Dong Hua Li, Jang-Gn Yun, Jung Hoon Lee, Yoon Kim, Doo-Hyun Kim, Gil Sung Lee, Se Hwan Park, Won Bo Shim, and Byung-Gook Park, "Investigation of Current Degradation Induced by Silicide Source/Drain in the nanowire NAND Flash Memory," Summer Annual Conference of IEIE, pp. 489-490, Jun. 2010
Se Hwan Park, Won Bo Shim, Seongjae Cho, Jung Hoon Lee, and Byung-Gook Park, "Optimization Design of Folded Split Gate Flash Memory," Summer Annual Conference of IEIE, pp. 477-478, Jun. 2010
Wandong Kim, Jung Hoon Lee, Seongjae Cho, Jang-Gn Yun, Se Hwan Park, Yoon Kim, Dong Hua Li, Doo-Hyun Kim, Gil Sung Lee, Won Bo Shim, and Byung-Gook Park, "Arch SONOS NAND Flash Memory Array with Improved Virtual Source and Drain Performance Due to the Field Concentration Effect," Korean Conference on Semiconductors, pp. 55-56, Feb. 2010
Seongjae Cho, Jung Hoon Lee, Won Bo Shim, Se Hwan Park, and Byung-Gook Park, "One-Time Programmable Nonvolatile Memory Device and Its Array Based on Metal-Insulator-Semiconductor Structure: Operation and Fabrication Method," Korean Conference on Semiconductors, pp. 286-287, Feb. 2010
Jang-Gn Yun, Seongjae Cho, Jung Hoon Lee, Gil Sung Lee, Yoon Kim, Dong Hua Li, Se Hwan Park, Won Bo Shim, Garam Kim, and Byung-Gook Park, "Three Dimensional Stacked Bit-line NAND Flash Array and Inter-layer Interference," Korean Conference on Semiconductors, pp. 53-54, Feb. 2010
Doo-Hyun Kim, Gil Sung Lee, Jung Hoon Lee, Seongjae Cho, Jang-Gn Yun, Dong Hua Li, Yoon Kim, Se Hwan Park, Won Bo Shim, Wandong Kim, and Byung-Gook Park, "VT decay mechanisms in SONOS flash memory retention mode including trapped charge redistribution effect," Korean Conference on Semiconductors, pp. 485-486, Feb. 2010
Gil Sung Lee, Jung Hoon Lee, Il Han Park, Seong-Jae Cho, Jang-Gn Yun, Doo Hyun Kim, Dong Hua Li, Yoon Kim, Se Hwan Park, Won Bo Shim, Jong Duk Lee and Byung-Gook Park, "Fabrication of Cone SONOS Memory for Better Program/Erase Characteristics," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 55-56, Feb. 20-22, 2008
Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Dong Hua Lee, Se-Hwan Park, Won Bo Shim, Jong-Duk Lee, and Byung-Gook Park, "Double-Recessed channel (DRC) flash memory," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 49-50, Feb. 20-22, 2008
Won Bo Shim, Byung-Gook Park, et al, "Optimum Read Operation Method of 2-bit NAND Flash Memory Considering the Pinch-off Effect Using 3-Dimensional Cut-off Gate", 2009 IEEK fall conference, Seoul, Korea, pp.49-50, Nov. 28, 2009
Yoon Kim, Won Bo Shim, Byung-Gook Park, et al, "Folded NAND Flash Memory Having Virtual Source/Drain", 2009 IEEK Summer conference, Jeju, Korea, pp. 397-398, July 8-10, 2009.
Won Bo Shim, Byung-Gook Park, et al, "Optimum Design of 2-bit NAND Flash Memory Using 3-Dimensional Cut-off Gate", 2009 IEEK Summer conference, Jeju, Korea, pp. 391-392, July 8-10, 2009.
Yoon Kim, Won Bo Shim, Byung-Gook Park, et al, "PCI Phenomenon for Sub 30nm Vertical Multi-bit SONOS Flash Memory", The 16th Korean Conference on Semiconductors, Deajeon, Korea, pp. 535-536, Feb. 18-20, 2009
Jang-Gn Yun, Won Bo Shim, Byung-Gook Park, et al, "Unselected Bit-Line Potential Boosting Effect in Stacked Vertical-channel NOR Flash Memroy," 2008 IEEK Fall Conference, Seoul, Korea, pp.389-390, November 29, 2008
Il Han Park, Won Bo Shim, Byung-Gook Park, et al, "Vertical-AND Array with Spacer Gate for High Density Flash Memories," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 411-412, Feb. 20-22, 2008
Yoon Kim, Won Bo Shim, Byung-Gook Park, et al, "4-bit SONOS NOR Flash Memory having Vertical Channel," 2007 IEEK Fall Conference, pp.441-442, Seoul, Korea, November 24, 2007
Seongjae Cho, Won Bo Shim, Byung-Gook Park, et al, "Program Operation Efficiency Dependency on Implement Condition of Flash Memory on SOI Substrate," 2007 IEEK Fall Conference, pp.439-440, Seoul, Korea, November 24, 2007
Jung Hoon Lee, Won Bo Shim, Byung-Gook Park, et al, "Arch-type Silicon Fin Fabrication Process Applied to Nano-scale Device," 2007 IEEK Fall Conference, pp.349-350, Seoul, Korea, November 24, 2007.
Jang-Gn Yun, Won Bo Shim, Byung-Gook Park, et al, "2-bit Recessed Channel SONOS Memory Having Vertical Split-gate Structure," 2007 IEEK Fall Conference, pp.345-346, Seoul, Korea, November 24, 2007.
Dong Hua Li, Won Bo Shim, Byung-Gook Park, et al, "Program Characteristics of SONOS Flash Memory Device due to the Thickness of Trapping Storage Node," 2007 IEEK Fall Conference, pp.445-446, Seoul, Korea, November 24, 2007.