Journal papers
Juyeong Pyo, Junwon Jang, Dongyeol Ju, Subaek Lee, Wonbo Shim* and Sungjun Kim*, “Amorphous BN-Based Synaptic Device with High Performance in Neuromorphic Computing,” Materials, vol. 16, no. 20, p. 6698, Oct. 2023. (*co-corresponding author)
Yongjin Park, Jihyung Kim, Sunghun Kim, Dahye Kim, Wonbo Shim* and Sungjun Kim*, "Effect of interfacial SiO2 layer thickness on the memory performances in the HfAlOx-based ferroelectric tunnel junction for a neuromorphic system", Journal of Materials Chemistry C, 2023, 11, 13886. (*co-corresponding author)
Chan-Gi Yook, Jung Nam Kim, Yoon Kim, Wonbo Shim, "Design Strategies of 40 nm Split-Gate NOR Flash Memory Device for Low-Power Compute-in-Memory Applications", Micromachines, vol.14, no.9, pp. 1753, Aug. 2023.
Wonbo Shim, "Impact of 3D NAND Current Variation on Inference Accuracy for In-memory Computing", IEIE Journal of Semiconductor Technology and Science, Vol. 22, No. 05, pp.341-345, Oct. 2022.
Seunghwan Song, Munhyeon Kim, Bosung Jeon, Donghyun Ryu, Sihyun Kim, Kitae Lee, Ho Lee, Jae-Joon Kim, Wonbo Shim, Daewoong Kwon, Byung-Gook Park, “Spiking Neural Network with Weight-Sharing Synaptic Array for Multi-Input Processing”, IEEE Electron Device Letters, vol. 43, no. 10, pp. 1657-1660, Oct. 2022.
Wonbo Shim, Shimeng Yu, "GP3D: 3D NAND based In-memory Graph Processing Accelerator", IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), vol. 12, no. 2, pp. 500-507, June 2022.
Jian Meng, Wonbo Shim, Li Yang, Injune Yeo, Deliang Fan, Shimeng Yu, Jae-Sun Seo, “Temperature-resilient RRAM-based in-memory computing for DNN inference,” IEEE Micro, vol. 42, no. 1, pp. 89-98, 1 Jan.-Feb. 2022.
Yuan-Chun Luo, Jae Hur, Zheng Wang, Wonbo Shim, Asif Islam Khan, Shimeng Yu, “A technology path for scaling embedded FeRAM to 28nm and beyond with 2T1C structure,” IEEE Transactions on Electron Devices, vol. 69, no. 1, pp. 109-114, Jan. 2022.
Shimeng Yu, Jae Hur, Yuan-Chun Luo, Wonbo Shim, Gihun Choe, Panni Wang, “Ferroelectric HfO2-based synaptic devices: recent trends and prospects,” Semiconductor Science and Technology, vol. 36, 104001, 2021.
Wonbo Shim, Shimeng Yu, “System-Technology Co-Design of 3D NAND Flash based Compute-in-Memory Inference Engine”, IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JxCDC), Vol. 7, no. 1, pp.61-69, June. 2021.
Shimeng Yu, Wonbo Shim, Xiaochen Peng, Yandong Luo, “RRAM for Compute-in-Memory: From Inference to Training”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 7, pp. 2753-2765, 2021, invited review.
Wonbo Shim, Shimeng Yu, “Ferroelectric field effect transistor based 3D NAND architecture for energy efficient on-chip training accelerator,” IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JxCDC), vol. 7, no. 1, pp. 1-9, June 2021.
Gihun Choe, Wonbo Shim, Panni Wang, Jae Hur, Asif Islam Khan, Shimeng Yu, “Impact of Random Phase Distribution in Ferroelectric Transistors based 3D NAND Architecture on In-Memory Computing”, IEEE Transactions on Electron Devices, vol. 68, no. 5, pp. 2543-2548, 2021.
Wonbo Shim, Shimeng Yu, “Technological design of 3D NAND based compute-in-memory architecture for GB-scale deep neural network,” IEEE Electron Device Letters, vol. 42, no. 2, pp. 160-163, 2021.
Wonbo Shim, Jae-sun Seo, Shimeng Yu, “Two-step write-verify scheme and impact of the read noise in multilevel RRAM based inference engine,” Semiconductor Science and Technology, vol. 35, 115026, 2020.
Wonbo Shim, Yandong Luo, Jae-Sun Seo, Shimeng Yu, “Investigation of read disturb and bipolar read scheme on multilevel RRAM based deep learning inference engine,” IEEE Transactions on Electron Devices, vol. 67, no. 6, pp. 2318-2323, 2020.
*Panni Wang, *Wonbo Shim, Zheng Wang, Jae Hur, Suman Datta, Asif Islam Khan, Shimeng Yu, “Drain-erase scheme in ferroelectric field effect transistor-Part II: 3D-NAND architecture for in-memory computing,” IEEE Transactions on Electron Devices, vol. 67, no. 3, pp. 962-967, 2020. (*equally contributed)
Panni Wang, Zheng Wang, Wonbo Shim, Jae Hur, Suman Datta, Asif Islam Khan, Shimeng Yu, “Drain-erase scheme in ferroelectric field effect transistor – Part I: device characterization,” IEEE Transactions on Electron Devices, vol. 67, no. 3, pp. 955-961, 2020.
Dong Hua Li, Wandong Kim, Won Bo Shim, Se Hwan Park, Yoon Kim, Gil Sung Lee, Doo-Hyun Kim, Jung Hoon Lee, Jang-Gn Yun, Seongjae Cho, Il Han Park, Jong-Ho Lee, Hyungcheol Shin, Byung-Gook Park, "Improvement of Characteristics with a Sub-5 nm Ge-Doped Silicon Nitride Layer in Charge Trap Flash Memory Cells," Nanoscience and Nanotechnology Letters, Volume 8, Number 7, pp. 577-580, Jul. 2016.
Dong Hua Li, Wandong Kim, Won Bo Shim, Se Hwan Park, Yoon Kim, Gil Sung Lee, Doo-Hyun Kim, Jang-Gn Yun, Seongjae Cho, and Byung-Gook Park, "Effects of Gate/Blocking oxide energy barrier on memory characteristics in charge trap flash memory cells," Nanoscience and Nanotechnology Letters, Vol. 7, No. 7, pp. 594-598, Jul. 2015.
Yoon Kim, Won Bo Shim, and Byung-Gook Park, "Gated twin-bit silicon–oxide–nitride–oxide–silicon NAND flash memory for high-density nonvolatile memory," Japanese Journal of Applied Physics, Vol. 54, No. 6, pp. 064201-, Jun. 2015.
Won Bo Shim, Seongjae Cho, Jung Hoon Lee, Dong Hua Li, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Se Hwan Park, Wandong Kim, Jungdal Choi, and Byung-Gook Park, "Stacked Gated Twin-Bit (SGTB) SONOS Memory Device for High-Density Flash Memory," IEEE Transactions on Nanotechnology, Vol. 11, No. 2, pp. 307-313, Mar. 2012.
Jang-Gn Yun, Garam Kim, Joung-Eob Lee, Yoon Kim, Won Bo Shim, Jong-Ho Lee, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Single-Crystalline Si STacked ARray (STAR) NAND flash memory," IEEE Transactions on Electron Devices, Vol. 58, No. 4, pp. 1006-1014, Apr. 2011.
Seongjae Cho, Won Bo Shim, Yoon Kim, Jang-Gn Yun, Jong Duk Lee, Hyungcheol Shin, Jong-Ho Lee, and Byung-Gook Park, "A Charge Trap Folded NAND Flash Memory Device With Band-Gap-Engineered Storage Node," IEEE Transactions on Electron Devices, Vol. 58, No. 2, pp. 288-295, Feb. 2011.
Wandong Kim, Jung Hoon Lee, Jang-Gn Yun, Seongjae Cho, Dong Hua Li, Yoon Kim, Doo-Hyun Kim, Gil Sung Lee, Se Hwan Park, Won Bo Shim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Arch NAND Flash Memory Array With Improved Virtual Source/Drain Performance," IEEE Electron Device Letters, Vol. 31, No. 12, pp. 1374-1376, Dec. 2010.
Joung-Eob Lee, Garam Kim, Kyung Wan Kim, Won Bo Shim, Jung Han Lee, Kwon-Chil Kang, Jang-Gn Yun, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Room-Temperature Operation of a Single-Electron Transistor Made by Oxidation Pocess Using the Recessed Channel Structure," Japanese Journal of Applied Physics: Regular Papers, Vol. 49, No. 11, pp. 1152021-1152026, Nov. 2010.
Doo-Hyun Kim, Seongjae Cho, Dong Hua Li, Jang-Gn Yun, Jung Hoon Lee, Gil Sung Lee, Yoon Kim, Won Bo Shim, Se Hwan Park, Wandong Kim, Hyungcheol Shin, and Byung-Gook Park, "Program/Erase Model of Nitride-Based NAND-Type Charge Trap Flash Memories," Japanese Journal of Applied Physics: Regular Papers, Vol. 49, No. 8, pp. 843011-843014, Aug. 2010.
Seongjae Cho, Won Bo Shim, Il Han Park, Yoon Kim, and Byung-Gook Park, "Highly Scalable 3-D NAND-NOR Hybrid-Type Dual Bit per Cell Flash Memory Devices with an Additional Cut-Off Gate," Journal of the Korean Physical Society, Vol. 56, No. 1, pp. 137-141, Jan. 2010.
Yoon Kim, Il Han Park, Seongjae Cho, Jang-Gn Yun, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Se Hwan Park, Dong Hua Li, Won Bo Shim, Wandong Kim, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "A Vertical 4-Bit SONOS Flash Memory and a Unique 3-D Vertical NOR Array Structure," IEEE Transactions on Nanotechnology, Vol. 9, No. 1, pp. 70-77, Jan. 2010.
Gil Sung Lee, Jung Hoon Lee, Il Han Park, Seongjae Cho, Jang-Gn Yun, Dong Hwa Li, Doo Hyun Kim, Yoon Kim, Se Hwan Park, Won Bo Shim, Wan Dong Kim, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Cone-Type SONOS Flash Memory", IEEE Electron Device Letters, Vol. 30, No. 12 pp.1332-1334, Dec. 2009.