Research Projects

Chips to Startup (C2S)

Ministry of Electronics & Information Technology (MeitY)

Government of India 

Our team has been selected for the implementation of a project entitled "Design & Development of System on Chip" in an administrative role in a specific Category, wherein the application-oriented R&D proposals with duration up to 5 Years (starting from May 2023) and targeted TRL level 7 were invited from 40 Institutions in Consortium mode for development of ASIC/ SoC/System/IP Core(s). Chips to Startup (C2S) Programme aims to train 85,000 number of Specialized Manpower over a period of 5 years in the area of VLSI and Embedded System Design and leapfrog in ESDM space by way of inculcating the culture of System-on-Chip (SoC)/ System Level Design at Bachelors, Masters and Research level and act as a catalyst for growth of Start-ups involved in fabless design. 


C2S Programme

In line with the objective and vision of NPE-2019, an umbrella programme "Chips to Startup(C2S)" not only aims at developing Specialized Manpower in VLSI/Embedded System Design domain but also addresses each entity of the Electronics value chain via Specialized Manpower training, Creation of reusable IPs repository, Design of application-oriented Systems/ASICs/FPGAs and deployment by academia/ R&D organization by way of leveraging the expertise available at Start-ups/MSMEs.

Participating Institutions

The programme would be implemented at about 100 academic institutions/R&D organizations across the Country. Besides them, Start-ups and MSMEs can also participate in the programme by submitting their proposals under Academia- Industry Collaborative Project, Grand Challenge/ /Hackathons/RFP for development of System/SoC/IP Core(s).

Identified Key Areas:

With a focus to develop frugal solutions around societal problem, it is envisioned that, under the programme, the project would be initiated in following key areas:

More details can be found at https://c2s.gov.in/about_c2s.jsp

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(In the recent past)

Special Manpower Development Program in Chips to System Design (SMDP-C2SD)

During the 9th Plan, MeitY (erstwhile DeitY) had initiated the Special Manpower Development Programme in VLSI Design and Related Software (SMDP-I) with a view to increase India’s share of the Global VLSI Design market from 0.5% to 5% by end of the 9th Plan period by making available specialized manpower required by the Design Centers / Industry. The project was initiated at nineteen institutions in 1998 with total outlay of Rs. 14.99 Crore and was completed in March 2005.

Seeing the impact of SMDP-I, MeitY (erstwhile DeitY) in the 10th Plan initiated SMDP-II with an aim to increase the global VLSI Design market share to around 15% by 2010. It also aimed to increase the availability of specialized manpower in the area of VLSI design so that the annual turnover from design houses could reach a figure of about Rs.5000 Crore by the year 2010. SMDP-II was initiated with a total outlay of Rs.49.98 Crores (over a period of 5 years) at 32 institutions. 7 Resource Centers(mainly IITs, IISc and CEERI) mentored 25 Participating Institutions (NITs and few others) for implementation of SMDP-II. SMDP-II concluded in the year 2013. SMDP-C2SD has concluded since November 2021.

Vision

The workforce in semiconductor design industry in India in 2009 was around 1,35,000. It grew at a Compounded Annual Growth Rate (CAGR) of 20% and was more than 2,30,000 in 2012. The Semiconductor Design Industry was around US$ 10.6 Billion by 2012. However, if it is proposed to achieve turnover of US$ 55 Billion by 2020 in the area of VLSI, Chip Design and other Frontier Technical Areas, it will require a sizable skilled manpower to meet these targets. The Government is also promoting Electronics System Design and Manufacturing(ESDM) in the country.

Mission

In the National Policy on Electronics, it is proposed to achieve turnover of US$ 400 billion by 2020. It follows that there is a need to develop manpower that has expertise not only in VLSI design but also in System on Chip / System Development. Thus, there is a need to initiate an integrated program entitled 'Special Manpower Development for Chips to System' which not only aims at developing specialized manpower in VLSI but also emphasizes on development of working prototypes of System on Chip / System using mostly ASICs / ICs designed in the program. This will, therefore, be a step towards bringing a 'SoC/System' development culture in academic institutions in the country.

Objectives

The main objectives of the Special Manpower Development Program for Chips to System programme are:

More details can be found at http://smdpc2sd.gov.in/

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Special Manpower Development Program (SMDP) - Phase II

Ministry of Communications & Information Technology, Govt. of India


Special Manpower Development Programme (SMDP) initiated by the Ministry of Communication & Information Technology (MCIT), Government of India is a vision to make our country a significant player in VLSI Design and related Software. It has concluded since March 2014.

 The program has its origin in the 9th Plan, when the Department of Information Technology (DIT), Government of India,  aimed to increase India's share of global VLSI Design market from 0.5 percent to 5 percent by the end of the Plan period. Considering the availability of quality human resource as a key catalyst for achieving this target, in 1998, DIT initiated the "Special Manpower Development Programme for VLSI Design and Related Software" (SMDP-I), involving nineteen institutions categorized into 7 Resource Centers (RC's) and 12 Participating Institutes (PI's). After completion of this project in March 2005, the second phase of the program (SMDP-II) was started in 2005  with the inclusion of additional six participating academic institutions. The Ministry has provided adequate funds to set up VLSI Design Laboratories with advanced CAD software tools in all the 25 institutions involved in this program.

 The objective of SMDP-II is to train manpower both at undergraduate (B.E / B. Tech) as well as  Masters (ME / M.Tech) and Doctoral (Ph.D) levels  in VLSI Design / Microelectronics. The establishment of VLSI Design Labs at RC's and PI's would also strengthen the academic programs in these institutions.

More details can be found at:  http://smdp2vlsi.gov.in/smdp2vlsi/index.jsp

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Special Manpower Development Program in VLSI Design & Related Software Phase-I (SMDP-I)

Specialized Manpower were trained at Post Graduate and Doctoral levels to generate key catalyst in area of Microelectronics area in the country. A total number of 9349 students were trained at various levels under this programme; Type-I: 170, Type-II: 1089, Type-III: 1220, Type-IV: 6870


Other Sponsored Project Details :

1. Project title : Aircraft Power Supply Design using Soft-Switched Inverters

Sponsoring Agency: MHRD 

Tenure : March-2003 to September-2007 (Completed ) 

Amount: 800000.00 (INR)

Status (Role): PI

2. Project title : FPGA based standalone tuneable Fuzzy Logic Controller module 

Sponsoring Agency: BRFST

Tenure : March-2011 to March-2014

Amount:  2802000.00

Status: Completed as Co-PI

3. Project title : Design and testing of BASEBAND and RF front end for IEEE802.15.4 zigbee standard

Sponsoring Agency : DRDO 

Tenure July-2011 to December-2012 

Amount 7500000.00 

Status : Completed as Co-PI

4. Project title :  Modeling simulation and performance optimization of SOI MOSFET

Spomsoring Agency : DST 

Tenure : July-2013 to July-2016 

Amount: 2290000.00 

Stauts : Completed as Co-PI