2650 Max

This is information about the 2650 Max Board I designed basically using a 2650, NVRam and a gal chip. Board has additional chips like 82c55 and 68B50 for any future development. Schematic Diagram below ...

Top view of the PCB is below...

The board runs with 1MHz clock, draws about 220mA @5V only with CPU chip, ram, gal and inverter gate chip. The original prototype has few minor mods  .. nothing drastic and easy to do.

Partly completed board to test it out using Pipbug ..

Take pin 2 out of the socket for 74ls14 chip (because of the short on pins 1 and 2)

This is updated schematic with the mod included ...

Parts

If you want to reconstruct this board ..here is few tips  ..

Testing out the board

To test the board .. got it going with PIPBUG monitor software  .. running at 300 baud.

Download: PipBug300

Here is a  snapshot of the terminal running the Pipbug software ..

Above is the "Simple answer program" running (as published in EA, March,1977).

As communication to this board is via TTL to USB converter, ... when using Pipbug.. the DUMP and LOAD command can be used by following the procedure below

As you can see (from above screenshot on the terminal window) the memory dump includes spaces .. which are saved to a text file. 

Walla !!!!  ..  board running old Pipbug software with a 2650.

At this point I have not tested out the 8255 or the 6850 chips

Gal  decoding

GAL chip is to be used for CS for the ram and other peripheral chips .. also providing the RD and WR signals for the chips separately

Below shows only CS for the nvRAM chip that has Pipbug and some ram space  allocated...

Name            2650 Max;

Partno          0001;

Revision        Ver 1;

Date            8/11/17;

Designer        mc;

Company         mcoz;

Location        oz;

Assembly        manual;

Device          g22v10;

/** Inputs **/

pin [1..5] = [a2..6] ;

pin [7..11] = [a7..11] ;

pin [13..15] = [a12..14];

pin 6 = OPREQ;

pin 16 = mnio;

pin 17= wrp;

pin 18= nrw;

/** Outputs **/

pin 22 = !pioCS;

pin 23 = !ramCE;

pin 21 = !aciaCS;

pin 19 = rd;

pin 20 = !wr;

/** Declarations and Intermediate Variable Definitions **/

field ioaddr= [a14..2];

ramCE_eqn    = ((ioaddr:[000X..03FX])&!nrw)#(ioaddr:[040X..0FFX]); 

/** Logic Equations **/

ramCE = ramCE_eqn & mnio;

wr = wrp & nrw;

rd=nrw;