2025:
[1] Raffel, Y., Hessler, D., Kumar, G., Olivo, R., Pirro, L., Chohan, T., Seidel, K., Hoffmann, R., Bhatnagar, D., Das, A., et al. (2025). Defect Dynamics in Silicon-Doped HfO₂-Based Front-End-of-Line FeFETs: Insights From Low-Frequency Noise on Doping Concentration, Interfaces, and Write Cycling. IEEE Transactions on Electron Devices. IEEE.
[2] De, S., Kumar, G., Chattopadhyay, A., Raffel, Y., Chakrabarti, B., & Hou, T.-H. (2025). Hafnium Oxide-Based Ferroelectric Memories: Applications and Future Prospects. Non-Volatile Memory and Selector Devices: Technology and Applications.
[3] De, S. (2025). Exploring the Potential of Hafnium Oxide-Based Ferroelectric Memories for Next-Generation Storage Class Memories. In Electron Device Technology and Manufacturing Conference.
[4] Sk, M. R., Das, A., Kumar, G., Bhatnagar, D., Roy, S., Raffel, Y., Lederer, M., Seidel, K., De, S., Chakrabarti, B., et al. (2025). Spike-Timing Dependent Learning Dynamics in Silicon-Doped Hafnium-Oxide Based Ferroelectric Field Effect Transistors. IEEE Journal of the Electron Devices Society. IEEE.
[5] Iung, T., Pérez Ramírez, L., Gloskovskii, A., Cho, C., Lao, M.-Y., De, S., Hou, T.-H., Lubin, C., Gros-Jean, M., Barrett, N., et al. (2025). Oxygen vacancy distribution and phase composition in scaled, Hf₀.₅Zr₀.₅O₂-based ferroelectric capacitors. Applied Physics Letters, 126(6). AIP Publishing.
2024:
[1] C.-Y. Cho et al., ‘Unraveling the Wake-Up Mechanism in Ultrathin Ferroelectric Hf0.5Zr0.5O2: Interfacial Layer Soft Breakdown and Physical Modeling’, IEEE Transactions on Electron Devices, 2024.
[2] C.-Y. Chiu, et al., ‘Trade-off Between Thermal Budget and Thickness Scaling: A Bottleneck on Quest for BEOL Compatible Ultra-Thin Ferroelectric Films Sub-5nm’, in IEEE Electron Devices Technology and Manufacturing Conference (EDTM), 2024.
[2] M. Rana Sk et al., ‘Spike-Time Dependent Plasticity in HfO2-Based Ferroelectric FET Synapses’, in IEEE Electron Devices Technology and Manufacturing Conference (EDTM), 2024.
[3] D. Hessler, et al., ‘Dopant-Dependent Flicker Noise of Hafnium Oxide Ferroelectric Field Effect Transistor’, in IEEE Electron Devices Technology and Manufacturing Conference (EDTM), 2024.
[4] S. De et al., ‘Perspective Roadmap of Advanced HfO2-based Ferroelectric Field Effect Transistors’, in IEEE Electron Devices Technology and Manufacturing Conference (EDTM), 2024.
[6] D. Jagga, S. De, and A. Useinov, ‘WKB model of ferroelectric tunnel junctions for memory applications: voltage-dependent screening and electrostriction effects’, in IEEE Electron Devices Technology and Manufacturing Conference (EDTM), 2024.
[7] A. Sunil et al., ‘Ferroelectric Field Effect Transistors--Based Content-Addressable Storage-Class Memory: A Study on the Impact of Device Variation and High-Temperature Compatibility’, Advanced Intelligent Systems, p. 2300461, 2024.
2023:
[1] A. Vardar, A. Munir, N. Laleni, S. De, and T. Kämpfe, ‘Hardware Aware Spiking Neural Network Training and Its Mixed-Signal Implementation for Non-Volatile In-Memory Computing Accelerators’, in 2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2023, pp. 1–4.
[2] Y. Raffel et al., ‘Impact of High-K Deposition Process on the Noise Immunity of FeFETs and their Applicability Towards In-Memory-Computing’, in IEEE International Integrated Reliability Workshop (IIRW), 2023.
[3] S. Chatterjee et al., ‘Defying Temperature: Reliable Compute-in-Memory in Monolithic 3D using BEOL Ferroelectric TFT’, in IEEE Electron Device Meeting (IEDM), 2023.
[4] S. De et al., ‘Application of Ferroelectrics: Monolithic-3D Inference Engine with IGZO Based Ferroelectric Thin Film Transistor Synapses’, Advanced Ultra Low-Power Semiconductor Devices: Design and Applications, pp. 235–260, 2023.
[5] Y. Raffel et al., ‘Importance of temperature dependence of interface traps in high-k metal gate stacks for silicon spin-qubit development’, Applied Physics Letters, vol. 123, no. 3, 2023.
[6] M. R. Sk et al., ‘1f-1t array: Current limiting transistor cascoded fefet memory array for variation tolerant vector-matrix multiplication operation’, IEEE Transactions on Nanotechnology, 2023.
[7] H.-H. Le et al., ‘CIMulator: a comprehensive simulation platform for computing-in-memory circuit macros with low bit-width and real memory materials’, arXiv preprint arXiv:2306. 14649, 2023.
[8] X. Ma et al., ‘A 2-transistor-2-capacitor ferroelectric edge compute-in-memory scheme with disturb-free inference and high endurance’, IEEE Electron Device Letters, 2023.
[9] K. Seidel et al., ‘Hafnium oxide-based Ferroelectric Memories: Are we ready for Application?’, in 2023 IEEE International Memory Workshop (IMW), 2023, pp. 1–4.
[10] M. R. Sk et al., ‘Fixed charges at the HfO2/SiO2 interface: Impact on the memory window of FeFET’, Memories-Materials, Devices, Circuits and Systems, vol. 4, p. 100050, 2023.
[11] Y. Raffel et al., ‘28 nm high-k-metal gate ferroelectric field effect transistors based synapses-a comprehensive overview’, Memories-Materials, Devices, Circuits and Systems, p. 100048, 2023.
[12] F. Müller et al., ‘Multi-Level Operation of ferroelectric FET Memory Arrays for Compute-In-Memory Applications’, in International Memory Workshop 2023, 2023.
[13] A. Vardar et al., ‘The True Cost of Errors in Emerging Memory Devices: A Worst-Case Analysis of Device Errors in IMC for Safety-Critical Applications’, in International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD 2023), 2023.
[14] F. Müller et al., ‘Multilevel operation of ferroelectric fet memory arrays considering current percolation paths impacting switching behavior’, IEEE Electron Device Letters, 2023.
[15] S. De et al., ‘28nm HKMG 1F-1R2 Multilevel Memory for Inference Engine Application’, in 2023 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA), 2023.
[16] J.-H. Hsuen et al., ‘Demonstration of Large Polarization in Si-doped HfO2 Metal--Ferroelectric--Insulator--Semiconductor Capacitors with Good Endurance and Retention’, in 2023 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), 2023.
[17] V. Parmar et al., ‘Demonstration of Differential Mode FeFET-Array based IMC-Macro for realizing multi-precision mixed-signal AI accelerator’, Advanced Intelligent System, 2023.
[18] M. Lederer et al., ‘SPICE compatible semi-empirical compact model for ferroelectric hysteresis’, Solid-State Electronics, vol. 199, p. 108501, 2023.
2022:
[1] S. De et al., ‘Demonstration of multiply-accumulate operation with 28 nm fefet crossbar array’, IEEE Electron Device Letters, vol. 43, no. 12, pp. 2081–2084, 2022.
[2] M. A. Baig et al., ‘3-d monolithic stacking of complementary-fet on cmos for next generation compute-in-memory sram’, IEEE Journal of the Electron Devices Society, vol. 11, pp. 107–113, 2022.
[3] S. De et al., ‘28 nm hkmg-based current limited fefet crossbar-array for inference application’, IEEE Transactions on Electron Devices, vol. 69, no. 12, pp. 7194–7198, 2022.
[4] X. Yin et al., ‘A homogeneous processing fabric for matrix-vector multiplication and associative search using ferroelectric time-domain compute-in-memory’, arXiv preprint arXiv:2209. 11971, 2022.
[5] S. De, Y. Raffel, S. Thunder, M. Ledered, F. Müller, and T. Kämpfe, ‘28nm High-K-Metal Gate Ferroelectric Field Effect Transistors Based Artificial Synapses’, in International Electron Devices & Materials Symposium 2022, IEDMS2022, 2022.
[6] S. De et al., ‘Monolithic-3D Inference Engine with IGZO Based Ferroelectric Thin Film Transistor Synapses’, in Advanced Ultra Low Power Metal Oxide Semiconductor Field Effect Transistors and their Applications, Wiley, 2022.
[7] Y. Raffel et al., ‘A Synergistic Approach of Interfacial Layer Engineering and READ-Voltage Optimisation in HfO2-Based FeFETs for In-Memory-Computing Applications’, ACS Applied Electronics Material, 2022.
[8] Y. Raffel et al., ‘Low Frequency Defect Analysis Methods in High-K Metal Gate Stacks for Spin-Qubit Application’, in 53rd IEEE Semiconductor Interface Specialists Conference (SISC), 2022.
[9] Y. Raffel et al., ‘Achieving Excellent Neuromorphic Performance of Si:HfO2-based FeFETs by Interface Fluorination’, in 53rd IEEE Semiconductor Interface Specialists Conference (SISC), 2022.
[10] Y. Raffel et al., ‘Three Level Charge Pumping On Dielectric Hafnium Oxide Gate’, in IEEE International Integrated Reliability Workshop, IIRW, 2022.
[11] S. De et al., ‘Roadmap for Ferroelectric Memory: Challenges and Opportunities for IMC Applications’, in International SoC Design Conference (ISOCC), 2022.
[12] S. De et al., ‘READ-Optimized 28nm HKMG Multi-bit FeFET Synapses for Inference-Engine Applications’, IEEE Journal of the Electron Devices Society, 2022.
[13] P. Pal, K.-J. Lee, S. Thunder, S. De, P.-T. Huang, and Y.-H. Wang, ‘Bending Resistant Multi-bit Memristor for Flexible Precision Inference Engine Application’, IEEE Transaction of Electron Device, 2022.
[14] M. Lederer et al., ‘Semi-empirical and Verilog-A compatible compact model for ferroelectric hysteresis behavior’, in International Conference on Simulation of Semiconductor Processes and Devices, 2022, 2022.
[15] Y. Raffel et al., ‘Interfacial Layer Engineering to Enhance Noise Immunity of FeFETs for IMC Applications’, in International Conference on IC Design and Technology, 2022, 2022.
[16] T. Ali et al., ‘Study of Nanosecond Laser Annealing on Silicon Doped Hafnium Oxide Film Crystallization and Capacitor Reliability’, in International Memory Workshop (IMW), 2022.
[17] S. De, A. Baig, B.-H. Qiu, H.-H. Le, Y.-J. Lee, and D. Lu, ‘Neuromorphic Computing with Fe-FinFETs in the Presence of Variation’, in The 2022 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), 2022, pp. 122–123.
[18] A. Vardar et al., ‘Mixed Intra Layer CNN Quantization for CIM Architectures’, in tinyML Summit 2022, 2022.
[19] S. De et al., ‘Low-Power Vertically Stacked One Time Programmable Multi-bit IGZO-Based BEOL Compatible Ferroelectric TFT Memory Devices with Lifelong Retention for Monolithic 3D-Inference Engine Applications’, in European Solid-state Devices and Circuits Conference, 2022, 2022.
2021 and Before:
[1] S. De et al., ‘Robust binary neural network operation from 233 K to 398 K via gate stack and bias optimization of ferroelectric FinFET synapses’, IEEE Electron Device Letters, vol. 42, no. 8, pp. 1144–1147, 2021.
[2] M. A. Baig et al., ‘Compact model of retention characteristics of ferroelectric FinFET synapse with MFIS gate stack’, Semiconductor Science and Technology, vol. 37, no. 2, p. 024001, 2021.
[3] S. De et al., ‘Random and Systematic Variation in Nanoscale Hf0.5Zr0.5O2 Ferroelectric FinFETs: Physical Origin and Neuromorphic Circuit Implications’, Frontiers in Nanotechnology, Emerging Neuromorphic Electronics and Materials for Post-Moore Computing Era, p. https-doi, 2021.
[4] S. De et al., ‘Ultra-Low Power Robust 3bit/cell Hf0.5Zr0.5O2 Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology’, in 2021 Symposia on VLSI Technology and Circuits, 2021.
[5] S. De, W.-X. Bu, B.-H. Qiu, C.-J. Su, Y.-J. Lee, and D. D. Lu, ‘Alleviation of Charge Trapping and Flicker Noise in HfZrO2-Based Ferroelectric Capacitors by Thermal Engineering’, in The 2021 International Symposium on VLSI Technology, Systems and Applications (2021 VLSI-TSA), 2021.
[6] J.-Y. Ciou, S. De, C.-W. Wang, W. Lin, Y.-J. Lee, and D. Lu, ‘Analytical modelling of ferroelectricity instigated enhanced electrostatic control in short-channel finfets’, in 2021 5th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 2021, pp. 1–3.
[7] S. De et al., ‘Uniform Crystal Formation and Electrical Variability Reduction in Hafnium-Oxide-Based Ferroelectric Memory by Thermal Engineering’, ACS Applied Electronic Materials, vol. 3, no. 2, pp. 619–628, 2021.
[8] D. D. Lu, S. De, M. A. Baig, B.-H. Qiu, and Y.-J. Lee, ‘Computationally efficient compact model for ferroelectric field-effect transistors to simulate the online training of neural networks’, Semiconductor Science and Technology, vol. 35, no. 9, p. 095007, 2020.
[9] S. De et al., ‘Tri-Gate Ferroelectric FET Characterization and Modelling for Online Training of Neural Networks at Room Temperature and 233K’, in Device Research Conference, 2020.
[10] C.-W. Wang et al., ‘Compact model for PZT ferroelectric capacitors with voltage dependent switching behavior’, Semiconductor Science and Technology, vol. 35, no. 5, p. 055033, 2020.