Talks
Invited Talks and Column
2024
초청 발표, "Module-Lattice based Post-Quantum Cryptography: From Algorithm to Architecture Design", 국가보안연구소, 2023.02.16.
2022
초청 발표, "미래의 암호체계: 소형 무기체계에 적합한 양자내성암호 기술 동향 및 발전 방향", 22년 미래 지상전력기획 심포지엄, 2022.06.16
2021
우수연구성과발표, "FPGA-based Hardware Accelerator Design for Lattice-based Post-Quantum Cryptography,", 대한전자공학회 반도체산학연워크샵, 2021.10.27.
Keynote Speech (기조 연설), "Lattice-based Post-Quantum Cryptography: From Algorithm to Architecture Design", 2021 International Conference on Advanced Technologies for Communications, Ho Chi Minh City, Vietnam, Oct. 14. 2021.
2020
"Ring-LWE Cryptoprocessor Architecture Design for Post-Quantum Cryptography", (주)라닉스, 2020.01.08.
2019
"Lattice based Post Quantum Cryptography and Architecture Design", 차세대 지능형 반도체 기술 워크샵, 대한전자공학회, 2019.11.06.
세미나 발표, "Ring-LWE Cryptoprocessor Architecture Design for Lattice-based Post-Quantum Cryptography", 삼성전자종기원, 2019.11.04.
"차량용 시스템 반도체", 현대자동차그룹 기술 세미나, 2019.05.09.
"Ring-LWE 기반 동형암호 기술 동향 (개념, 알고리즘, SW, HW)", 한국전자통신연구원 (ETRI), 2019.04.18.
2017
"Introduction of Error Correction Coding Algorithm and Architectures", 대한전자공학회 오류정정부호기술 워크샵, 2017.07.20.
"미래자동차용 전장 부품 기술 및 산업 동향", 인천 자동차 전장 부품기업 기술 교류회, 2017.06.29.
2016
"오류정정부호 기술 및 아키텍처 설계" , 한양대 에리카캠퍼스, 2016. 5. 9.
2015
"Forward Error Correction Codes and Architectures", 아이닉스, 2015. 8.25.
"통신용 디지털 SoC 설계", 한양대 에리카캠퍼스, 2015, 5. 1.
2003 ~ 2013
"저복잡도 저전력 BCH 복호기 설계 및 구현", 삼성 종합기술원, 2013.10.07.
“메모리용 BCH 하드웨어 설계 기술”, 대한전자공학회 메모리용 오류정정기술워크샵, Oct. 26, 2011.
“Forward Error Correction Architectures for 100Gb/s Optical Communications”, Dept. of Electrical & Computer Engr., Univ. of Minnesota, Minneapolis, USA, April 21. 2011.
“Soft-Decision-based FEC Architecture for Optical Communications”, Bell Labs, Murray Hill, USA, Nov. 18. 2010.
“Forward Error Correction Architectures for Optical Communications”, ETRI, July 15. 2010
“VLSI Implementation of Forward Error Correction Architecture for Optical Communications”, Tutorial, ICEIC2010, June 30 2010.
"광통신용 FEC 설계 기술 동향," IDEC Newsletter, 2009.11 [PDF]
"High-Speed Low-Complexity Reed-Solomon Decoder Architectures for Communicatons ", ETRI, Oct. 26. 2007.
"High-Speed Low-Complexity Forward Error Correction Architectures for Fiber Optics Communicatons ", ETRI, May 14. 2007.
"Reed-Solomon Coding Architectures", Samsung Advanced Institute of Technology (삼성종합기술원), Feb. 7, 2007.
"High-Speed/Low-Complexity Digital Filter Design," LG전자 기술원, SoC 핵심 기술 그룹, Nov. 7, 2006.
"High-Speed Forward Error Correction Architectures", ETRI, April 17. 2006.
"Chip Design Methodology", ETRI, Jan. 14. 2005
"통신용 Digital Signal Processor 및 SoC", Samsung Electronics, SoC Research Center, Oct. 19, 2004.
"정보통신공학의 역할과 전망", IT 전문가 세미나, 인하대, Sept. 7. 2004.
"DSP Architecture and SoC Design for Wireless infrastructure", 2004 DSP Workshop, Korea, Aug. 27. 2004.
"DSP Architecture and SoC Design for Wireless infrastructure", Sungsil University, Aug. 24. 2004.
"Low-Complexity, High-Speed Forward Error Correction Architecture for Optical Communications", Emerging Information Technology Conference , Princeton University, Nov. 1. 2003.
"Emerging Trends in Digital Signal Processor Architectures", Samsung Electronics, May 31. 2003.
"Emerging Trends in Digital Signal Processor Architectures", Embedded Systems Research Center, Seoul National University, June 24. 2003
"High-speed/Low-Complexity Reed-Solomon decoder and Multiprocessor SoC" KAIST, IDEC, July 4. 2003
Chonbuk National University, School of Electronics and Information, June 12. 2003
Book
제2판 VHDL을 이용한 디지털 시스템 설계(Digital System Design Using VHDL by Charles H. Roth, Jr., Lizy Kurian John), 강진구, 이한호, 조경순, 최상방 역, CENGAGE LEARNING, 2008