Weekly Reports

Made final website modifications to reflect the work from previous weeks.

As the semester winds down, I wrapped up my time allocated for working on DSD by trying to run lab 6 with the digital potentiometer and making final changes to the Frogger final project.

This week I finished up my writeup for lab 4 and started the Frogger webpage. I have been focused primarily on finishing the Frogger project with the minimum viable product my team initially had in mind. This week was spent focusing on player movement, enemy functions, and color manipulation to manage VGA color.

I have written up tutorials for labs 1, 2, 3, and 5 using the Cmod A7 FPGA board. I also recorded and uploaded videos explaining my procedure on YouTube. All of this can be found under "Digital System Design" then the respective lab page.

I am currently writing the same sort of material for lab 4, as I have also finished that one.

I am also working to complete lab 6 and then work on the Frogger final project. My goal this week will be to manipulate the 'frog' on the screen using buttons connected to the Cmod board.

I am finishing this week out by updating the backlog of reports for weeks 10, 11, and 12. I have also written up the sections for the half-adder and full-adder. I need to stop procrastinating so I don't end up getting stuck with so much to write. Luckily there is only so many more entries I will need to make as the semester wraps up.

This weekend I spend significant time working on lab 3 and lab 4. Though it's an added challenge, I refuse to give up recreating the labs on the Cmod A7 board I purchased. As demonstrated in my lab write-ups, there is much that it has taught me about FPGA behavior, VHDL, and electronics on the whole. I successfully implemented and demonstrated labs 3 and 4 working this week.

Below you can see the absolute mess of wires it took to get the two labs to run!

I spent this week finishing lab 2 and making all appropriate modifications as recommended on Professor Lu's GitHub.

For the final project, my group of 8 people chose to split into two groups of four. I will be working with Elizabeth Cone, James Fong, and Sarah Bertussi. After doing some research on common applications for FPGAs, I found that hobbyists often emulate old school video games. I took that as inspiration and came up with the idea to recreate the arcade game Frogger on an FPGA.

This week we did some background research on other people who have created Frogger. One great resource we found was from Columbia University. This project is very similar to what we are aiming to accomplish, and goes very in depth on aspects like image processing and audio implementation.

I started lab 2, which is to make a 4 digit hex counter using a 4 digit seven segment display. I was having a very hard time using the GPIO pins to take input from momentary push buttons, and could not figure it out for quite a while.

I decided to backtrack to simpler projects, including creating a half-adder and full-adder, utilizing external pushbutton input and external LED output. In these examples, I found out that my issue was caused by noise. To resolve this, my group mate Sarah Bertussi suggested I include pull down resistors within my circuit. Luckily, this solved my problem and I was able to create the half and full-adder circuits successfully.

I will continue lab 2 with these findings next week!

To kick things off, I resolved numerous managerial responsibilities that I had been putting off. I updated my backlog of weekly entries, which was around 3 weeks of content at this point. I also reformatted my website to make it more appealing and easier to navigate now that I needed to incorporate the lab work. I uploaded the GPIO and stopwatch programs to my GitHub page.

It took many, many hours, but I finally was able to write up the necessary programs for lab 1, including 'leddec', 'counter', and 'hexcounter'. I uploaded all VHDL and XDC files to GitHub, as well as the project files created by Vivado upon execution.

I will include a more detailed walkthrough of the lab on the respective page for the lab, which can be found in the top right of the header on this website. I also began work on lab 2 in an attempt to catch up, but was facing some difficulty using a phase locked loop within the Clocking Wizard interface on Vivado to amplify the internal clock frequency of my Cmod A7 from 12 Mhz to 100 Mhz. I will continue to work on this throughout the week, as well as flesh out a walkthrough of how I completed lab 1.

Finally, I created a YouTube channel, which is linked on the home page, to upload videos of my work in this class and potentially future FPGA projects if I am interested.

Figuring out the constraints was one thing. Mapping pinouts for a seven-segment display was a whole different beast. I messed around for too long trying to remember the basics of electronics. I haven't really done any breadboarding since my junior year of high school so I forgot a lot of things.

I began with some basic breadboarding, using a 9-Volt battery to illuminate an LED. Yes, you heard that right. I forgot the resistor. I'm now down one LED. Rest in Peace green LED.

From lighting up an LED, I moved on to a sound buzzer, then incorporated a push button. Once I had felt comfortable I hooked up my first seven-segment display and started mapping out the pinouts. I may or may not have forgotten a resistor again. Understanding how to connect the anode and different segments, I began reading (skimming!) through the documentation for the Cmod A7 found here.

The Digilent webpage for the board offers very easy to comprehend tutorials on programming the LEDs, and even set up a stop watch on a 4 digit seven-segment display. I managed to run both of these programs and uploaded them to GitHub. It took me way too much time to map all of the pinouts with the program provided, but I did manage to succeed. I struggled with faulty wires and a low quality breadboard, so I invested in better equipment that I will hopefully have for the next lab.

The two pictures below show the before and after of button pressing in the GPIO demo. The program is a two-bit binary counter that displays the results using two LEDS.

My teammates were able to complete Lab 1 on their own using our communal Nexys A7, but I was determined to use the hardware collection I own to execute the labs myself. I will be focusing on this next week as I am currently working on midterms for other classes.

Whilst waiting to begin lab, I watched more YouTube videos on how FPGAs have evolved over time, and what their practical applications are. I watched a few videos specifically on how the Cmod A7 board I purchased works, and read up on its documentation for specific features. It was very challenging to find too many introductory videos.

There are no significant updates for this week. I have purchased the necessary peripherals to use my Cmod A7 FPGA, as well as some essential electronics components to begin testing the board. I also purchased a multimeter for myself.

Most of this equipment will arrive by next week. I am eager to begin trying out the hardware first-hand.

This week, we created groups to efficiently distribute FPGAs throughout the class. I founded the "Kevin Lu's #1 Fan Club" group with seven other students, and then created a group chat for all of us over the messaging platform GroupMe.

I did some research on the projects listed on FPGA4Fun.com, a website I found last week. I ended up purchasing numerous basic electronic components to begin practicing FPGA related projects on my own time.

Lastly, I made previous weeks' reports collapsable to not overwhelm site users with ample text.

I started off the week by restructuring my personal website layout to encourage more streamlined navigation. I removed any sections left empty and reformatted this weekly reports section, while also making it easier to locate from the home page.

Continuing through the textbook, I read chapters 8, 9 and 10 of Free Range VHDL. To gain a better understanding, I watched YouTube videos from Ben Eater on what a decoder is (Video 1, Video 2), and read about comparators. Afterwards, I continued to review the previous sections of the textbook with the provided exercises. I compared my answers with the solutions available on the author Fabrizio Tappero's GitHub.

Later in the week, I finished the remaining three chapters of the textbook. I began to explore other resources to start learning how to use an FPGA and encountered FPGA4Fun.com, a website that hosts 26 projects designed to teach you how to use FPGAs. As of Friday, I am looking into getting basic hardware components to try these projects and also have on hand for future personal electronics projects.

In the course lectures this week, we read through chapters 3 and 4 of the textbook. During lecture, Brianna and I distributed the spreadsheet and had approximately 30 students sign up to join the FPGA network we are looking to establish.

I launched GHDL and ran the examples for a half adder and a full adder to try and familiarize myself with the software. To practice programming in VHDL, I went through their respective programs and attempted to recreate them myself.

For the first week, I reviewed the course syllabus and began the creation of a rudimentary website through Google Sites. This website will house my Digital System Design weekly reports, where I will record anything relevant I do towards the CPE-487 course throughout each week. The website also acts as a central hub for my GitHub repositories, LinkedIn, and more.

After establishing my website, I read the first eight chapters of the textbook "Free Range VHDL" and watched supplementary YouTube videos to learn about Finite State Machines and basic logic gates. Once I felt comfortable with my understanding of the subject material, I installed GHDL and Xilinx Vivado onto my computer and ordered a Cmod A7 FPGA from Digilent.

Finally, I worked with my peer Brianna Garland to create a spreadsheet where students in CPE-487 could indicate their need to borrow or ability to share FPGAs. This information will be used to formulate groups that will allow every student living near the Hoboken area to get access to a hands-on education during the COVID-19 pandemic.