EDAthon 2018

ISVLSI-EDAthon 2018 was held successfully on 8 July 2018 with twelve 2-member teams coming from universities across mainland China, Hong Kong, Taiwan and Korea. During the one-day competition, all participants exercised their sophisticated coding and analytical skills to solve interesting EDA problems. The three teams below were awarded for their outstanding performance.

Other pictures and happy moments from the day are shown below!

EDAthon is a whole-day programming contest (9:00am-3:00pm programming + 3:30pm-4:30pm seminar) that features interesting and challenging topics in Electronic Design Automation (EDA). It is also a unique opportunity to bring together talents for EDA which enables the rapid advancement in computer technology. The contest will involve solving interesting problems in the broad context of Computer-Aided Design (CAD) of integrated circuits and systems. It will emphasize on team work, problem solving skills and programming techniques for EDA applications. It is a goal of EDAthon and CEDA HK to promote EDA in Hong Kong and her neighboring regions, and to nurture the best of the next-generation students and professionals for the EDA community.

The contest is open to two-person teams of graduate students or senior undergraduate students currently full-time enrolled in a university, specializing in EDA or related areas. Teams will be selected based on their academic backgrounds and their relevant EDA programming experiences. A fixed sum of travelling grants will be offered to a certain number of teams subject to fund availability and discretion of the organizing committee. In the contest, there will be five problems selected from the following areas:

• System Design and Analysis
• Logic and High-level Design
• Physical Design
• Circuit Analysis
• Emerging Technologies, e.g., DFM, Security, Biochip, Machine Learning in EDA etc.

During the contest, students will be given the problem statements and some sample test data. The answers will be judged based on their correctness under the given constraints using hidden benchmarks. The teams winning the contest will be rewarded with trophies and cash prizes.

Contest Venue:

• PQ 604, Mong Man Wai Building, The Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong SAR (香港 紅磡 香港理工大學 蒙民偉樓 PQ 604)
• For local arrangement issues, please contact Mr. Lei HAN (Email: cslhan@comp.polyu.edu.hk; Tel: 55753780).

Schedule:

• 8:00--8:30 : Registration
• 8:45--9:00 : Opening
• 9:00--15:00 : Contest (Lunch will be provided)
• 16:00: Teams collecting reimbursement (PQ 604)
• 16:30--18:00: Mini-seminars on contest problems
• 18:00: Photo-taking
• 18:30--20:30: Dinner (Staff Club Restaurant - 5/F, Communal Building, PolyU) and Prize Presentation

Reference

Problem 1: Mask Optimization with Inverse Lithography Technique

• Jhih-Rong Gao, Xiaoqing Xu, Bei Yu, David Z. Pan, “MOSAIC: Mask Optimizing Solution With Process Window Aware Inverse Correction”, ACM/IEEE Design Automation Conference (DAC), pp. 52:1–52:6, San Francisco, CA, June 1–5, 2014.
• http://cad-contest.cs.nctu.edu.tw/CAD-contest-at-ICCAD2013/problem_c/

Problem 2: Data Placement Algorithm with Access Graph as Input

• https://en.wikipedia.org/wiki/Racetrack_memory
• http://vhosts.eecs.umich.edu/mibench
• Xianzhang Chen, Edwin H.-M. Sha, Qingfeng Zhuge, Chun Jason Xue, Weiwen Jiang and Yuangang Wang. "Efficient Data Placement for Improving Data Access Performance on Domain-Wall Memory." In IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 10, pp. 3094-3104, Oct. 2016.

Problem 3: Resource-Constrained Scheduling during High Level Synthesis

• https://en.wikipedia.org/wiki/High-level_synthesis
• Zhong, Guanwen, Alok Prakash, Yun Liang, Tulika Mitra, and Smail Niar. "Lin-analyzer: a high-level performance analysis tool for FPGA-based accelerators." In Proceedings of the 53rd Annual Design Automation Conference, p. 136. ACM, 2016.
• https://llvm.org
• http://web.cse.ohio-state.edu/~pouchet.2/software/polybench/

Problem 4: Nonlinear Classification by Support Vector Machines

• https://en.wikipedia.org/wiki/Support_vector_machine
• Boser B E, Guyon I M, Vapnik V N. A training algorithm for optimal margin classifiers[C]//Proceedings of the fifth annual workshop on Computational learning theory. ACM, 1992: 144-152.
• https://www.python.org/

Problem 5: Garbage Collection for MLC NAND Flash Memory Storage Systems

• Z. Qin, Y. Wang, D. Liu, Z. Shao and Y. Guan, MNFTL: An Efficient Flash Translation Layer for MLC NAND Flash Memory Storage Systems, 48th IEEE/ACM Design Automation Conference (DAC 2011), San Diego, CA, USA, June 5-10, 2011.

Past EDAthon

• EDAthon 2017

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