[P9] Power on Data Line (Fast Power Chip)
[P9] Power on Data Line (Fast Power Chip)
Project Description:
In this project, a collaborative effort was undertaken between two groups from TUD (HPSN and PSN) and the Siliconally company to design and implement a chip that powers on the data line.
As the technical coordinator (from HPSN), I played a key role in the project during the tape-out process. This included setting up and running regression and coverage tests for the top-level design, managing technical meetings between project partners, and overseeing the progress of the design for the tape-out deadline. Additionally, I liaised with Racyics, a service provider for advanced semiconductor technology, to plan for the packaging and design GDS file submission to GlobalFoundries. I also made arrangements to outsource PCB design and purchase critical components such as uC, PLL, and PHY well in advance of the tape-out to avoid any market shortages. The successful tape-out in November 2021 was the result of the hard work and collaboration of all colleagues involved, and the measurement was performed in the first quarter of 2022. I prepared and submitted the final report for the project.
I would like to thank Dr. Sebastian Höppner for his technical and administrative support throughout this project.