Chapter 8

Finite State Machine Design Using VHDL

8.1 VHDL Behavioral Representation of FSMs

Modeling FSMs from a state diagram is a straightforward process using VHDL behavioral modeling.
The real engineering involved in implementing FSM is in the generation of the state diagram that solved the problem at hand.

8.2 One-Hot Encoding for FSMs

Due to the general versatility of VHDL, there are many approaches that can be used to model FSMs using VHDL.
The actual encoding of the FSM’s state variables when enumeration types are used is left up to the synthesis tool.
If a preferred method of variable encoding is desired, using the attribute approach detailed in this section is a simple but viable alternative.

Report abuse