Sponsored Research:
Principal Investigator for project: "A High-Speed SAR Analog to Digital Converter(ADC) with low distortion sample-and-hold front-end", RESPOND Program, ISRO, Govt. of India, (ISRO/RES/3/749/17-18)
Principal Investigator for project: “Development of a low cost, low power and compact gas sensing platform”, Department of Science and Technology, Govt. of India, UKIERI (INT/UK/P-90/14). In collaboration with Cambridge University,UK.
Principal Investigator for “Distortion and Accuracy Improvement in Sample-and-Hold Circuits for Analog-Digital Converters", Department of Science and Technology, Govt. of India (DST-NSERC grant no. SR/S3/EECE/0119/2010). The objective of the project is to develop high speed analog and mixed-signal circuits for analog-front-ends (AFE) used in advanced communication, networking and instrumentation systems. A novel bootstrapped-gate sample-and-hold circuit has been designed and layout implemented using 0.18 micron CMOS technology and submitted for fabrication.
“Novel Analog Circuits Using Double Gate MOSFET”, Indo-French Collaboration on Advanced Research (CEFIPRA). Department of Science and Technology, Govt. of India. The objective is to develop novel circuits using double-gate MOSFET in collaboration with ISEP, Paris, France.