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Email: bipin@njit.edu
Phone:  +1 973 596 3516
Office:  327 ECEC


Mailing address:
337 ECEC
Department of Electrical and Computer Engineering
New Jersey Institute of Technology Newark, NJ 07102

I am an Associate Professor in the Helen and John C. Hartmann Department of Electrical and Computer Engineering, New Jersey Institute of Technology.

I direct the Intelligent Computing Laboratory. I am interested in the following topics:

  • Biomimetic engineering & computation
  • Architectures and systems for intelligent computing
  • Novel materials & devices for next-generation computing applications
  • Algorithms & analytics for urban challenges


THERE ARE CURRENTLY NO VACANCIES FOR SUMMER INTERNSHIP IN MY GROUP


News: 
Dr. Rajendran will give an invited talk at the 3rd HALO Workshop (Hardware and Algorithms for Learning On-a-Chip, ) co-located at 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), on November 16th in Irvine, CA.  

Two papers from our group accepted at ICECS 2017
  • Anakha V. Babu and Bipin Rajendran, Stochastic Deep Learning in Memristive Networks
  • Shruti R. Kulkarni, John M. Alexaides, Bipin Rajendran, Spike-Based Supervised Learning for Handwritten Digit Recognition 
Dr. Rajendran wins a competitive Faculty Seed Grant from New Jersey Institute of Technology for developing Brain-inspired Visual Learning Systems.

A research poster from IBM Zurich, EPFL, and NJIT (with Ph.D. student S. R. Nandakumar) was adjudged among the top three at the 17th Non-Volatile Memory Technology Symposium, 2017.

Dr. Rajendran awarded a research grant from the US National Science Foundation on Probabilistic Learning for Deep Spiking Neural Networks.

Dr. Rajendran will give an invited talk at the IEEE 60th International Midwest Symposium on Circuits and Systems titled "Spiking Neural Networks - Algorithms, Hardware Implementations and Applications",  in Boston, MA.

Dr. Rajendran (with Dr. Rashmi Jha, University of Cincinnati) co-organized a rump session titled Neuromorphic computing - Do devices matter?", at the 75th Device Research Conference.

Dr. Rajendran (with Dr. Davood Shahrjerdi, NYU) co-organized a short course titled Memory Devices for the Next 10 Years", at the 75th Device Research Conference.

Dr. Rajendran gave an invited talk at the 231st ECS Meeting titled "Synaptic Plasticity in a Memristive Device below 500mV", in New Orleans, LA.

Dr. Rajendran (with Dr. Jae-sun Seo at ASU) co-organized and presented a tutorial titled “Towards the Ultimate Brain Computer – Hardware Designs of Artificial & Spiking Neural Networks", at 2017 International Joint Conference on Neural Networks (IJCNN 2017) in Anchorage, AK.

Paper accepted at DRC 2017
  • S. R. Nandakumar, I. Boybat, M. Le Gallo, A. Sebastian, B. Rajendran, and E. Eleftheriou, Supervised Learning in Spiking Neural Networks with MLC PCM Synapses.
Ph.D. student S. R. Nandakumar wins IBM Ph.D. Fellowship, 2017. Congratulations!

Dr. Rajendran awarded an SRC research grant (with Prof. Jae-sun Seo, ASU) to work on Neuromorphic Computing System Design based on Emerging Memories.

Dr. Rajendran gave an invited talk at The IEEE Non-Volatile Memory Technology Symposium, 2016.

Dr. Rajendran to serve on the TPC of DRC & NVMW 2017
 
Paper accepted at NIPS 2016 (Acceptance ratio: 0.227)
  • Pulkit Tandon, Yash Malviya and Bipin Rajendran, Efficient and Robust Spiking Neural Circuit for Navigation Inspired by Echolocating Bats
Paper accepted at SISPAD 2016
  • S. R. Nandakumar and Bipin Rajendran, Verilog-A Compact Model for a Novel Cu/SiO2/W Quantum Memristor.
Paper accepted at DRC 2016
  • S. R. Nandakumar and Bipin Rajendran, Physics-based Switching Model for Cu/SiO2/W Quantum Memristor.

Paper accepted at Nanoletters, March 2016
  • S. R. Nandakumar, Marie Minvielle, Saurabh Nagar, Catherine Dubourdieu, and Bipin Rajendran, A 250 mV Cu/SiO2/W memristor with half-integer quantum conductance states.

Paper accepted at EANN 2015
  • Shruti Kulkarni and Bipin Rajendran - Scalable Digital CMOS Architecture for Spike based Supervised Learning.


Four papers from our group accepted at IJCNN 2015
  • Navin Anwani and Bipin Rajendran - Normalized Approximate Descent based Supervised Learning
    Rule for Spiking Neurons
  • Shibani Santurkar and Bipin Rajendran -  C. elegans chemotaxis inspired neuromorphic circuit for contour tracking and obstacle avoidance
  • Sushrut Thorat and Bipin Rajendran -  Arithmetic Computing via Rate Coding in Neural Circuits with
    Spike-triggered Adaptive Synapses
  •  Chaitanya Prasad Narisetty, Krishnakant Saboo and Bipin Rajendran - Composer Classification based on Temporal Coding in Adaptive Spiking Neural Networks
Paper on live demonstration accepted at ISCAS 2015.
  • C. Shetty, P. Shah, S. Nitchith, R. Rawat, Nandakumar S. R, S. Kulkarni & B. Rajendran - Spiking Neural Circuit Based Navigation Inspired by C. elegans Thermotaxis

My students: Yogesh Singh, Vinay Joshi and Praveen Rathe won the first prize at the Ideathon Competition at VLSI Design Conference 2015. 

Two manuscripts uploaded in ArXiv. 
  • S. Santurkar & B. Rajendran - A neural circuit for navigation inspired by C. elegans Chemotaxis (Link). This work  has been cited by MIT Tech Review.
  • S. Santurkar & B. Rajendran - Sub-threshold CMOS Spiking Neuron Circuit Design for Navigation Inspired by C. elegans Chemotaxis (Link)
Paper with my collaborator published in HPCA 2015.
  • P. J. Nair, C. Chou, B. Rajendran & M. K. Qureshi - Reducing Read Latency of Phase Change Memory via Early Read and Turbo Read
Paper with my collaborator published in Nature Scientific Reports.
  • Saptarshi Mandal, Ammaarah El-Amin, Kaitlyn Alexander, Bipin Rajendran & Rashmi Jha - Novel   synaptic memory device for neuromorphic computing, Nat. Sci. Rep. 4, 5333; (2014).

 Two papers from our group accepted at DRC 2014

  • N. Panwar, D. Kumar, N. K. Upadhyay, P. Arya, U. Ganguly and B. Rajendran - Memristive Synaptic Plasticity in PCMO RRAM by Bio-mimetic Programming
  • R. Meshram,  B. Rajendran and U. Ganguly - Biomimetic 4F2 synapse with intrinsic timescale for pulse based STDP by I-NPN selection device

 Two papers from our group accepted at IJCNN 2014

  • A. Bora, A. Rao and  B. Rajendran - Mimicking the worm - an adaptive spiking neural circuit for contour tracking inspired by C. Elegans thermotaxis.
  • A. Singha, B. Muralidharan and  B. Rajendran - Analog Memristive Time Dependent Learning Using Discrete Nanoscale RRAM Devices.

Paper based on a teaching-learning study conducted in a class I taught last semester accepted at T4E, 2014.

  • A. Anand, A. Kothiyal, B. Rajendran & S. Murthy - Guided Problem Solving and Group Programming - A Technology-Enhanced Teaching-Learning Strategy for Engineering Problem Solving, IEEE International Conference on Technology for Education, 2014.

Paper based on a teaching-learning study conducted in Neuromorphic  Engineering class I taught last year accepted at LaTiCE, 2015.

  • A. Kothiyal, B. Rajendran & S. Murthy - Delayed Guidance: A teaching-learning strategy to develop ill-structured problem solving skills in engineering, International Conference on Learning and Teaching in Computing and Engineering, 2015.