HW / SW Co-design

HW / SW Co-Design of Embedded System

Any embedded system designed for a reactive, real-time application is designed as a mixed Software and Hardware systems. The SW is generally used for providing flexibility in the real-time conditions and the HW is used for higher throughput. Design of an embedded system can be subjected to many constraints like area size, execution time, power consumption, reliability and cost.

The traditional method of design involves specifying and designing the hardware and software of the system separately. The partition of the software and hardware modules are decided beforehand and is adhered to as much as possible, because even small changes later in the system require complete re-design. Design engineers mostly try to include as much functionality as possible as software modules and design hardware modules only in those places where there are timing constraints. But this method has its discrepancies.

The above issues are addressed in the co-design framework of embedded systems. It involves a process where no prejudice is given either to hardware or software before beginning the design, the designers try to achieve the functionality alone.The design is done with a unified hardware-software representation and this is maintained throughout the design process so as to retain the formal properties of the system.

On the whole, the co-design method offers a much more advantageous choice of design considering the different parameters of cost, area size, execution time and the total power consumed. The HW-SW partitioning of the modules can be done at a later stage so as to achieve flexibility in choosing between a wide range of choices and trying to optimize between the above mentioned parameters.

I started to perform HW-SW co-design on DCT algorithm using POLIS Methodology. Later I explored through the different tools that can be used to perform Co-design, these include Ptolemy Classic, Ptolemy II, Bluespec System Verilog, SystemC etc..,

Flowchart of POLIS co-design methodology

Finally, we choose Bluespec System Verilog to implement the DCT algorithm.