Students

洪奕文(Yi-Wen Hung)

During 2017 ~ Now Research :     Status :      Full Time Student

錢睿宏(Jui-Hung Chien)

During 2011 ~ 2017 Research :     Stacking IC thermal induced reliability issues Status :     Industrial Technology Research Institute (ITRI)

周仲韓(Chung-Han Chou)

During 2011 ~ 2016 (Graduated) Dissertation Title:     Clock Tree Design Under Ultra Low Voltage and     Energy Recycling Status :      益華電腦 (Cadence)

陳聿廣(Yu-Guang Chen)

During 2011 ~ 2016 (Graduated) Dissertation Title:       Live Free or Die Hard: Leveraging Design Cost and       Reliability for Modern Design Techniques Status :      Assistant Professor of National Central University

周宣明(Hsuan-Ming Chou)

During 2010 ~ 2015 (Graduated)Dissertation Title:      Optimizations for Error-Tolerant Designs Considering      Multi-Power Modes and Out-of-Order Transactions Status :       MediaTek (MTK)

龍巧玲(Chiao-Ling Lung)

During 2007 ~ 2012  (Graduated) Dissertation Title:       Reliability-aware 3D IC Designs Status :      Industrial Technology Research Institute (ITRI)

李明釗(Ming-Chao Lee)

During 2006 ~ 2012  (Graduated) Dissertation Title:      Design Optimization for Power Gating Status :        Synopsys, Taiwan

高聿謙(Yu-Chien Kao)

During 2006 ~ 2013 (Graduated) Dissertation Title :     Analysis and Optimization for the Post-Silicon Skew     Tuning Architecture Status :      Global Unichip

仇德軒(De-Shiuan Chiou)

During 2005 ~ 2009 (Graduated) Dissertation Title:      Performance and Power Optimization for     Power Gating Designs Status :      Synopsys, Taiwan

郭育旻(Yu-Min Kuo)

During 2004 ~ 2009 (Graduated) Dissertation Title :     Efficient Timing Criticality Analysis and Functional     Flexibility Exploration for Clock Gating and ECO Designs  Status :      MediaTek (MTK)

蘇祐世(Yu-Shih Su)

During 2003 ~ 2009 (Graduated) Dissertation Title :     Variability and Reliability Aware Performance & Timing     Optimization of VLSI Designs  Status :     MediaTek (MTK)

林政宏(Cheng-Hung Lin)During 2002 ~ 2008 (Graduated) Dissertation Title :     Efficient Algorithm and Architecture Design for     Regular Expression Matching Status :     Associate professor of National Taiwan Normal University

謝政道(Cheng-Tao Hsieh)

During 2002 ~ 2007 (Graduated) Dissertation Title :     Switching Activity Based Reliability Analysis     and Optimization for VLSI Designs Status :     Skymizer, Taiwan.

陳杰暘During 2018 ~ 2020Latest Degree :     Master of Computer Science, NTHUThesis Title :     AirConcierge : Generating Task-Oriented Dialogue via Efficient Large-            Scale Knowledge Retrieval Status :     慧榮科技 (Silicon Motion)

王姵心During 2018 ~ 2020Latest Degree :     Master of Computer Science, NTHUThesis Title :     Contextual Temperature for Language Model Status :     益華電腦 (Cadence)

周心平During 2018 ~ 2020Latest Degree :     Master of Institution of Information Systems and Applications, NTHUThesis Title :    Remix: Rebalanced Mixup Status :     新思科技 (Synopsys)

陳浩雲During 2018 ~ 2020Latest Degree :     Master of Computer Science, NTHUThesis Title :     Learning with Hierarchical Complement Objective Status :     聯發科技 (MediaTek)

Praveen KumarDuring 2017 ~ 2019 Latest Degree :      Master of Institution of Information Systems and Applications, NTHU Thesis Title :    Rethinking the Feature Learning for Personal Identification System                using Gait Status :     美光 (Micron)

劉峻豪During 2017 ~ 2019 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Sequence Learning Based on Hierarchical LSTM with Attention Module Status :     台灣積體電路 (TSMC)

魏楚蒨During 2017 ~ 2019 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Person Identification by Walking Gesture Using Skeleton Sequences Status :      緯創 (Wistron)

吳祥修During 2017 ~ 2019 Latest Degree :     Master of Computer Science, NTHU Thesis Title :    Accuracy Tolerance Neural Networks Under Aggressive Power                    Optimization Status : 

    新思科技 (Synopsys)

梁肇宏During 2017 ~ 2019 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Improving Adversarial Robustness via Guided Complement Entropy Status :     益華電腦 (Cadence)

曾璿安During 2016 ~ 2018 Latest Degree :     Master of Computer Science, NTHU Thesis Title :    Nested LSTM: Modeling Temporal Dynamics and Taxonomy in Location-       Based Mobile Check-ins Status : 

    台灣積體電路 (TSMC)

張書桓During 2016 ~ 2018 Latest Degree :     Master of Computer Science, NTHU Thesis Title :    A Reinforcement Learning Based .Logic Synthesis Framework .for Further     Area Optimization Status : 

    台灣積體電路 (TSMC)

許啟宏During 2016 ~ 2018 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     MONAS : Multi-Objective Neural Architecture Search using                 Reinforcement Learning Status : 

    慧榮科技 (Silicon Motion)

蔡佳陵During 2016 ~ 2018 Latest Degree :     Master of Industrial Engineering and Management, NCHU Thesis Title :    A LSTM-Based Algorithm for Estimating Plantar Pressure Dynamics              Using Inertial Sensors Status : 

    群聯電子 (Phison)

蘇育毅During 2016 ~ 2018 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Dynamic Early Terminating of Multiply-Accumulate Operation for                 Convolutional Neural Networks Status : 

Austin SoDuring 2016 ~ 2018 Latest Degree :     Thesis Title :     A Hierarchical Approach for Efficient Workload Allocation in Deep Neural      Network Enabled Edge Computing Status : 

羅騏During 2015 ~ 2017 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     A Dynamic Deep Neural Network Design for Efficient Workload       Allocation in Edge Computing Status : 

    新思科技 (Synopsys)

李侑倫During 2015 ~ 2017 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     DC-Prophet: Predicting Catastrophic Machine Failures in DataCenters Status :     台灣積體電路 (TSMC)

陳君函During 2015 ~ 2017 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Mining Structures of Convolutional Neural Networks: An Energy                 Perspective Status : 

     新思科技 (Synopsys)

王韻婷During 2015 ~ 2017 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Aging-aware Chip Health Prediction Adopting an Innovative       Monitoring Strategy Status : 

     台灣積體電路 (tsmc)

卓思辰During 2014 ~ 2016 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     An Efficient Snoop Filter with Adaptive Mechanism       in Multiprocessor Systems Status :      台灣積體電路 (TSMC)

張翠云During 2014 ~ 2016 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Sensor-Based Time Speculation Adapting to PVT Variations Status :      群暉科技 (Synology)

許凱翔During 2014 ~ 2016 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Contactless Testing for Pre-Bond Interposers Status :      新思科技 (Synopsys)

王志揚During 2014 ~ 2016 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Learning-Based Alleviation of Overoptimistic Voltage Scaling      in Pre-Error AVS Systems Status :      台灣積體電路 (TSMC)

蕭元超During 2014 ~ 2016 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Clock Skew Optimization for Voltage Variation Status :      聯發科技 (MediaTek)

黎晉丞During 2013 ~ 2015 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     An Efficient Architecture for Resolving the Aging Problem of Snoop Filter Status :      聯發科技 (MediaTek)

曹 靜During 2013 ~ 2015 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Cache Interference Free Architecture in Snoop Based Cache      Coherence ProtocolStatus :    思科系統 (Cisco), Taipei

林雪如During 2013 ~ 2015 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     A Methodology for Alleviating Die Shift of Fan-Out Wafer-Level      Packaging (FOWLP) Status :      台灣積體電路 (TSMC)

溫婉妤During 2013 ~ 2015 Latest Degree :     Master of Computer Science (Data Science),     University of Southern California (USC), U.S. Thesis Title :     Q-Learning Adaptive On-Line Dynamic Voltage Scaling for Designs      with Graceful Degradation Status : 

     Amazon, U.S.

賴彥廷During 2012 ~ 2014 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Ping-Pong Mesh: An Efficient Clock Mesh Design Status :      台灣積體電路 (TSMC)

徐瑞祥During 2012 ~ 2014 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Contactless Stacked-die Testing for Pre-bond Interposers  Status :      台灣積體電路 (TSMC)

賴冠宇During 2012 ~ 2014 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Yield and Timing Constrained Spare TSV Assignment      for Three-Dimensional Integrated Circuits  Status :      聯發科技 (MediaTek)

陳意喬During 2012 ~ 2014 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     High-Performance Deadlock-Free ID Assignment      for Advanced Interconnect Architectures  Status :      Google, Taipei

陳靜怡During 2011 ~ 2013 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     A Novel Fuzzy Matching Model for Lithography Hotspot Detection Status :      慧榮科技 (Silicon Motion)

林聖淵During 2011 ~ 2013 Latest Degree :     Master of Computer Science, NTHU Thesis Title :      A High Performance Parallel Algorithm for Approximate String Matching       on Multi-core Processor Status :      聯發科技 (MediaTek)

吳鴻昌During 2011 ~ 2013 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Coverage Assertion for Coverage Measurement      in a Hardware-Accelerated Environment Status :      瑞昱半導體 (Realtek)

俞 浩

During 2011 ~ 2013 Latest Degree :     Ph.D. of Computer Science,    University of California, Los Angeles (UCLA), U.S. Thesis Title :     Package Aware Thermal Analysis and Reliable 3D IC Design Status :       Amazon, U.S. 

鄭名延

During 2010 ~ 2012 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     3D Variation-Aware Clock Tree Synthesis Status :      晨星半導體 (Mstar)

沈君謙

During 2010 ~ 2012 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Reusing Block-Level Test Patterns for Concurrency-Oriented      Verification at System Level Status :      聯發科技 (MediaTek)

蔡念豫

During 2010 ~ 2012 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Stress and Crack Aware Design in 3D IC Status :      台灣積體電路 (TSMC)

蔡坤庭

During 2010 ~ 2011 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Synthesis of an Efficient Controlling Structure for     Post-Silicon Skew Minimization Status :      聯發科技 (MediaTek)

黃士修 During 2009 ~ 2011Latest Degree :    Master of Computer Science, NTHUThesis Title :    Fault-Tolerant 3D Clock NetworkStatus :    台灣雅虎 (Yahoo! Taiwan)

劉振雄

During 2009 ~ 2011 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Optimization of Perfect Hashing for Memory-Efficient     Pattern Matching Architectures on Graphic Processing Units Status :       慧榮科技 (Silicon Motion)

蔡昇宇During 2008 ~ 2010 Latest Degree :     Master of Computer Science, NTHU Thesis Title :      Accelerating Regular Expression Matching      Using Multi-threaded Algorithm on GPU Status :        晨星半導體 (Mstar)

曾子毅During 2008 ~ 2010 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     High Performance Soft-Error Tolerant Design Status :        晨星半導體 (Mstar)

何宜倫During 2008 ~ 2010 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     A Thermal-Driven Task Allocation for 3D MCP Throughput Optimization Status :      瑞昱半導體 (Realtek)

林辰宇During 2007 ~ 2009 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     An Efficient Phase Detector Positioning for Post-Silicon     Clock Skew Minimization Status :      新思科技 (Synopsys)

徐偉翔During 2007 ~ 2009 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Throughput Optimization for Thermally Constrained Multi-Core Processors Status :      安派科技 (Apache)

楊承智During 2007 ~ 2009 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Adjustable Delay Buffers for Clock Skew Minimization in     Multi-Voltage Mode Designs Status :      台灣積體電路 (TSMC)

鄭又慈During 2007 ~ 2009 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     An Efficient Wakeup Scheduling Considering Resource Constraint     for Sensor-Based Power Gating Designs Status :      中華電信

林群裕During 2007 ~ 2009 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     High-Performance Pattern Matching Algorithm on GPU Status :        晨星半導體 (Mstar)

陳志強During 2006 ~ 2008 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Design and Verification for Dual Issue VLIW Digital Signal Processor Status :        晨星半導體 (Mstar)

翁士閎During 2006 ~ 2008 Latest Degree :      Ph.D. of Computer Science,      University of California, San Deigo (UCSD), U.S. Thesis Title :     A Novel Sequential Circuit Optimization with Clock Gating Logic Status :      Facebook, U.S.

蕭海騏During 2006 ~ 2008 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Clock Skew Optimization Using Linear Programming under     Multi-Corner Multi-Mode Conditions Status :      聯發科技 (MediaTek)

張雅婷During 2006 ~ 2007 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Engineering Change Using Spare Cells with Constant Insertion Status :      聯發科技 (MediaTek)

戴鈺唐During 2005 ~ 2007 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Optimization of Pattern Matching Algorithm for Memory     Based Architecture Status :       聯發科技 (MediaTek)

翟靖宇During 2005 ~ 2007 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Design Automation of High Speed Domino Circuits Status :      台灣積體電路 (TSMC)

阮大成During 2005 ~ 2007 Latest Degree :     Ph.D. of Computer Science & MS of Machine Learning,     Carnegie Mellon University (CMU), U.S. Thesis Title :     Fine-Grained Sleep Transistor Sizing Algorithm for     Leakage Power Minimization Status : 

     Google, U.S.

陳昱廷During 2005 ~ 2007 Latest Degree :     Ph.D. of Computer Science,     University of California, Los Angeles (UCLA), U.S. Thesis Title :     An Efficient Wake-up Schedule during Power Mode     Transition Considering Spurious Glitches Phenomenon Status :  

      Google, U.S.

包洵瑋During 2005 ~ 2007 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Timing Analysis Considering Simultaneous IR drop and Crosstalk Noises Status :      聯發科技 (MediaTek)

林敬倫During 2004 ~ 2006 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Engineering Change Using Spare Cells Status :       聯發科技 (MediaTek)

王大中During 2004 ~ 2006 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     An Efficient Mechanism for Performance Optimization of     Variable-Latency Designs Status :      聯發科技 (MediaTek)

張岳隆During 2004 ~ 2006 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Efficient Boolean Characteristic Function for Timed ATPG Status :      老張魯肉飯進口貿易出公司

江長平During 2004 ~ 2006 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Hardware Design of Regular Expression Matching Status :      台灣積體電路 (TSMC)

陳仕昕During 2004 ~ 2006 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Timing Driven Power Gating Status :      聯發科技 (MediaTek)

許永靖During 2003 ~ 2005 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Constraint Hardware Model for Efficient Random Verification Status :      瑞昱半導體 (Realtek)

簡龍昇During 2003 ~ 2005 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Prediction and Analysis of Voltage Drop Based on     Transmission Line Theory Status :      NVIDIA, U.S.

林建丞During 2003 ~ 2005 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Lower Bound Estimation of Maximum Instantaneous     Current for Sequential Circuits Status :      益華電腦 (Cadence)

翁懿歆During 2003 ~ 2005 Latest Degree :     Master of Electrical Engineering,      University of Southern California (USC), U.S. Thesis Title :     Efficient Calculation of Timed Probability Density Function Status :       Intel, U.S.

張柏賢During 2003 ~ 2005 Latest Degree :     Ph.D. of Computer Science,     University of California, Santa Babara (UCSB), U.S. Thesis Title :     Synthesis of a Novel Timing Error Detection Architecture Status :      Oracle, U.S.

簡鶴松During 2002 ~ 2004 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     Automatic Cell Library Generator for Transistor Array     Based Programmable Cell Array Status :      宏達電子 (HTC)

吳凱強During 2002 ~ 2004 Latest Degree :     Ph.D. of Electrical and Computer Engineering,     Carnegie Mellon University (CMU), U.S. Thesis Title :     Delay Variation Tolerance for Domino Circuits Status :      國立交通大學資訊工程學系 副教授

蔡志昇During 2001 ~ 2003 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     動態可程式化邏輯陣列之低功率設計 Status :      安謀國際科技 (ARM Taiwan)

陳錫錦During 2001 ~ 2003 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     JPEG2000的實作與驗証 Status :      力華 (POWER CHINESE LTD)

黃盛智During 2001 ~ 2003 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     靜態分析最大瞬時電流估流 Status :      聯發科技(MediaTek)

施建中During 2001 ~ 2003 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     智慧型亂數驗證向量產生器 Status :      聯詠科技 (Novatek)

黃永昌During 2001 ~ 2003 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     以節省光罩成本為目的之工程變動設計及設計自動化 Status :      聯發科技 (MediaTek)

古明鑫During 2001 ~ 2003 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     一層金屬光罩可程式細胞陣列之設計與設計自動化 Status :      海思半導體 (Hisilicon)

林建佑During 2000 ~ 2002 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     JPEG2000之高效能區塊編碼架構設計 Status :      凌陽科技 (Sunplus)

劉振華During 2000 ~ 2002 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     H.26L 全域搜尋區塊比對移動估計器之設計 Status :      聯發科技 (MediaTek)

許家齊During 2000 ~ 2002 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     應用導線再排序將動態可程式化邏輯陣列之時序最佳化 Status :      力華 (POWER CHINESE LTD)

余明道During 2000 ~ 2002 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     應用相關時序差異的時鐘樹緩衡器尺吋設計 Status :     凌陽科技 (Sunplus)

林志忠During 2000 ~ 2002 Latest Degree :     Master of Computer Science, NTHU Thesis Title :     進階微控制器晶片內建匯流排架構(AMBA)之實現 Status :