張世杰教授 Professor Shih-Chieh Chang
Professor Shih-Chieh Chang received the B.S. degree in electrical engineering from National Taiwan University in 1987 and the Ph.D. degree in electrical engineering from the University of California, Santa Barbara in 1994. He worked at Synopsys, Inc. in mountain view, CA, from 1995 to 1996. Then, He joined the department of computer science and information engineering of National Chung Cheng University from 1996-2001. He is now a professor in the department of computer science in National Tsin-Hua University. Professor Shih-Chieh Chang is now an Associate Editor of ACM Transaction on Design Automation of Electronic System and is currently the IEEE circuit and system chapter chair of Taipei section. He has published more than 70 technical papers and has served in the several Program committees such as ICCAD, DAC, ICCD, ISQED, and ASPDAC. His current research interests include low power and low energy optimization, variation aware optimization and tolerance, 3D design methodology. He received a Best Paper award at the 1994 Design Automation Conference.
Professor Chang realized several challenges while downscaling to nanometer techniques through long-term industry-university cooperation. As the result, he investigated several efficient algorithms and architectures to solve these problems and apply them into EDA commercial tools. In last five years, he has published lots of papers at top-level international conferences and journals, including 15 conference papers at ICCAD/DAC/INFOCOM, 6 conference papers at DATE/GLOCOM and 11 journal papers at IEEE transactions on TCAD/TVLSI or ACM TODAES. One of his papers discussed about ATPG-based logic optimization has been cited more than 400 times. Therefore, both quantity and quality of his papers are outstanding. On the other hand, professor Chang has been invited to be the technical member of DAC and an editor of ACM TODAES. In addition, he has been invited to publish his researches at VLSI-DAT, ISOCC, ASICON and SASIMI. Meanwhile, he participated in academic group of IC design, and was IEEE Taipei Section secretary, IEEE Taipei Section chair, director of TICD, chairman of VLSI/CAD conference, vice-chairman of ISOCC conference, chairman of QHR-DAT alliance of Ministry of Education and director of IC design center at National Tsing Hua University. Additionally, he advised students very well. His students have got the first place at CAD contest and SIP contest, the third place at IC design contest and the second place at TAU international contest on power grid analysis.
Professor Chang is the CEO of National Program for Intelligent Electronics (NPIE) from 2011 to 2015. Total budget for the NPIE is more than 10 billion in 5 years. NPIE supports medical, green energy, cars and 3C. He has many long term projects with industries. Currently, he has industry-university projects with NovaTek and Faraday, which focus on clock tree optimization. He is also the PI of grand project which is cooperated by National Tsing Hua University and Industrial Technology Research Institute (ITRI), and this project investigating 3D IC issues. Among all, several projects have been cooperated with Faraday for more than 10 years. These outstanding researches have been applied to lots of products and papers, which were published at top level international journals. It is worth to mention that 3MPCA has been identified as one of the best logic array design methodology in nanometer SoC process. It is capable to compete with top-level technology companies, such as IBM. Moreover, this technology has been implemented into productions. As the above reasons, Faraday announced the report which points out the outstanding contributions from professor Chang.
For more details, please refer to Prof. Chang's homepage : http://www.cs.nthu.edu.tw/~scchang/
Professor of Dept. of Computer Science,
National Tsing Hua University, Hsin-Chu, Taiwan.
Tel: 03-5742964, FAX : 03-5723694
Rm. 644, EECS building Email: scchang@cs.nthu.edu.tw