TMS70C02 SBC Project

TMS70C02 SBC Board

02/17/2021

A few years ago a generous friend gave me this TMS70C02 based single board computer. The TMS70C02 is not a very well known microprocessor but fortunately I was able to locate a compiler and full datasheet online. A key discovery from the datasheet was

: On Reset:
The MSB and LSB of the RESET interrupt vector are fetched from locations
>FFFE and >FFFF, respectively (see Table 3-13, page 3-26),
and loaded into the Program Counter.
Program execution begins from the address placed in the Program Counter.


Looking at the dump of both ROMs I located the vector table at $FFF0-FFFF
in the ROM from U4. FFFE & FFFF pointed to address $8000 ROM in U5
That contained these bytes: 52,AA,0D,73,EF,30,A3,0D,06,A2,23,01,8A,40,00,D0,31
Again referring to the data on the instruction set I decoded a few instructions.


52 AA MOVE $52 -> A

AA MOVE A -> Stack Pointer

06 Disable Interrupts

A2 23 01 Move 01 to Port 23 (Timer 3 reload register)

8A 40 00 Move contents of $4000 -> A (unknown at this time)

D0 31 Move A -> R31


This code made sense as initialization code and was enough to confirm that
the ROM in U4 covered the 16K address range of $C000-$FFFF and U5 covered
address $8000-$BFFF.

Next step was to trace out a few connection points to the CPU.
I identified the power leads, reset signal and a few bits on I/O PORTA.
I could then make an attempt to write code that would blink some LEDs connected to PORTA.

Once this was accomplished I had an idea on how to code a delay routine and approximate the values needed to produce a specific time delay as well as reliable output & input to/from PORTA.
(* many hours invested here)

Next step would be to use the pins on PORTA to produce serial output
(starting out with a relatively slow baud like 1200)
Followed by code for a routine that would input serial data at that rate.
(* many more hours invested here)

Once I had reliable serial input and output working I could code routines to examine any memory location and print the contents to a terminal.
The next step of course would be to write code to store data at any memory location.

These eventually evolved into the dump memory and set memory monitor commands and allowed me to easily try writing the reading from various memory locations to identify the 2K of RAM at $4000-$47FF.

Next I worked on routines that would receive bytes from the PC and store them in RAM allowing me to use a modification of a PC program I had already written to upload the .HEX files created by the assembler.

Finally I could test code in RAM and no longer needed to erase & burn a new EPROM for each code change. Only when a routine was debugged and working in RAM would it be added to the base ROM code.



Resources and Tools:

I located this assembler that targeted the TMS70c02: http://john.ccac.rwth-aachen.de:8000/as/



Software:

The monitor program offers these features

CPU connection map

With additional connectors

The Master Mind Game Intro (Click image for full view)

File Links: (click to download) Description


MONROM03.ASM Monitor Source Code


T7000pgmr.zip Source and binary for command line utility to upload a HEX file to the 8080 system


tms70c02_datasheet.pdf TMS70C02 Datasheet.