In the Advanced Higher course, the fetch-execute cycle builds on the information from Higher and includes the role of three internal processor registers:

• Memory Address Register (MAR)

• Memory Data Register (MDR)

• Instruction Register (IR)

The processor has many registers - some of which are general purpose. But some have specific purposes

• Memory Address Register (MAR)

  • This holds the address of the location in memory that is to be written to or read from

• Memory Data Register (MDR)

  • This holds the data that is to be written to or has been read from memory

• Instruction Register (IR)

  • Contains the next machine-code instruction to be executed.

The Fetch Execute Cycle

When the processor is reading data from memory it will use the following steps

1. The processor sets up the memory address register (MAR) with the required address.

2. The processor activates the read line on the control bus.

3. An instruction is fetched from the memory location using the data bus and stored in the memory data register.

4. The instruction is stored in the instruction register, where it is interpreted by the decoder component of the control unit and carried out.