We will see how pushing a user button, triggers interrupt for the processor.
The user button, when pushed connects PA0 to ground and to Vcc otherwise.
Let's see how the vendor delivers GPIO Interrupt to the processor. How's the design? How they are connected. Because, we know somehow all the interrupt should come to NVIC. But the way they (vendors) deliver to the NVIC is different.
There's an Engine called EXTI hanging to the APB2 bus. It connects 23 peripherals-interrupts from board to the NVIC as it is shown in its block diagram. For instance, RTC's Wakeup interrupt comes to the NVIC via the EXTI Engine. So peripherals such as SPI directly uses NVIC.
We can verify whether EXTI connects our peripherals interrupts to the NVIC in the MCU Vector table. 23 of them are there as shown.
Now, we will see how the GPIOs connect to the NVIC. From the figure below, all the 0th pins are connected to a multiplexer EXT10 which goes to the NVIC. So, at a time only one of all the 0th pins from the port can request the handler. Same for all the pins.
As, we open the STM CubeMX Software, it shows the user button is nothing button a GPIO pin and it is PA0. GPIO is general purpose input-output register. General purpose means it can be used for varied purposes such as Reading data from the external world, writing data to the external world, issuing interrupts from the external world and tracking events. You need to decide what is its purpose and then configure the GPIO accordingly. For ex, to drive relay, you configure the GPIO in output mode. If reading data, you configure it to input. For delivering any interrupt over the GPIO pin, you keep that into interrupt mode.
We can select the PA0 as an interrupt in CubeMX software. then we can select if we want to use EXT10 line to poke the NVIC. This connection needs to be established because NVIC belongs to the uP and EXTI belongs the micro-controller. Then, we can also select, if we want to generate a interrupt-handler. Generate code, in the it.c file which interrupt.c file, we see all the handlers for all the enabled interrupts. Now, keep the break-point at EXTI0_IRQHandler and once we press the button, the debug window enters this handler.
Now, let's see what is the address of the EXTI in Memory-map.
Now, the register of our interest is Pending_Register. As we find its offset, we get to the register address by 0x4001 3C00 + 0x14 = 0x40013C14.
The pending register sets the bit for the EXT line whose interrupt is pending. For ex, here it is 0th. Thus, the PR bit will read 1 to indicate the 0th line of EXTI has one interrupt pending. This bit is to be cleared as soon as the interrupt is executed. While tinkering, i commented the line that clear this bit after execution of the interrupt.
I put a break point at EXTI Handler. As i press the user button, the corresponding PR register bit at 0x40013C14 is set to 1 indicating that the interrupt on EXTI0 line is pending. Also, the processor is in the "handler" mode.
I removed the break-point and hit enter, still the bit is set to 1 because i have commented out the reset line. Now, i again put the break-point and hit run, the break-point is hit because the interrupts are hit infinite times because we have removed the part where its bit is forcefully hit. And even if i remove the break-point the processor is always in the handler mode.
Now, when i re-enable that line that forcefully sets the resets the bit, i see the processor comes into thread mode again.