Vector table is a table of vectors.
Table here, contain addresses. Thus, a table of addresses of vectors.
Vectors, here, are exceptions. Both the system and external exceptions, includes 15 System exceptions and 240 Interrupts.
Position is wrt NVIC. It is also called IRQ Number. Not given because it is set by the ARM, ST as vendour cant change it.
Priority is default. Settable or fixed.
Among interrupts, Watchdog has the highest priority!
Address: For every exception, there is a handler. Handler is nothing but a C-Code that take cares of that exception. So, this address here stores the address of handler. That means, these addresses will hold the addresses of this function pointer.
00000000 is reserved because it holds the Stack-Pointer Address. For ARM, it is required to first call the stack pointer before the Reset Handler.
All this is handled in the startup file.
As illustrated in the next figure, the handlers are WEAK in nature, so you can change them as i did in the main file to see if the addresses of this functions are actually stored in the desired address of respective exceptions.
On defining NMI_Handler as a function in main and checking what address is alloted to it, and verifying if the processor memory really holds this address at 0x00000008 or not.
Summarizing,
Processor Core and NVIC together constitute ARM-Cortex Processor. At 0 th position, ST Guys have issued Watchdog at 0th position. SPI1 is issued on 35th position of the NVIC. These are IRQ numbers. Different vendours can put different exceptions at different IRQs but at the end, everyone should accomodate all the exceptions in the NVIC.
TI, for instance puts GPIOA at IRQ0, the address however is same. System exception is same as it is given default by ARM (vendours cant change it).
Now, we will take an example of GPIO pin or to be specific, take an example of USER button. Then, we will see how pressing of user button delivers interrupt to the uP which leads to the execution of our interrupt handler.