Embedded Files
Theory:
A JK flip-flop is a sequential logic circuit, named after Jack Kilby, that stores and manipulates binary data, overcoming the limitations of the SR flip-flop by having a "toggle" function when both inputs are high.
BLOCK DIAGRAM:
TRUTH TABLE:
BOOLEAN EXPRESSION:
VERILOG CODE:
module jkff(j,k,clk,rst,q,qb);
input j,k,clk,rst;
output q,qb;
reg q,qb;
always@(posedge clk)
if(rst==1)begin
q=0;
qb=1;
end
else
case({j,k})
2'b00:
begin q<=q;qb<=qb; end
2'b01:
begin q<=0;qb<=1; end
2'b10:
begin q<=1;qb<=0; end
2'b11:
begin q<=qb;qb<=q; end
endcase
endmodule
TEST BENCH:
module jkff_tb;
reg j;
reg k;
reg clk;
reg rst;
wire q;
wire qb;
jkff uut (
.j(j),
.k(k),
.clk(clk),
.rst(rst),
.q(q),
.qb(qb)
);
initial begin
clk=1;rst=1;#100;
rst=0;j=0;k=0;#100;
j=0;k=1;#100;
j=1;k=0;#100;
j=1;k=1;#100;
end
always #50 clk=~clk;
endmodule
OUTPUT:
PIN ASSIGNMENT:
input j->pin 86
input k->pin 90
input clk->pin 94
input rst->pin 100
output q-> pin 20
output qb->pin 26
RTL SCHEMACTIC:
Device utilization summary:
Timing analysis:
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