Book Chapter:
1. I. Kim, A. Maiti, L. Nazhandali, P. Schaumont, V. Vivekraja and H. Zhang, "From Statistics to Circuits: Foundations for Future Physical Unclonable Functions," Chapter 3 in "Towards Hardware Intrinsic Security: Foundations and Practice," Eds. Ahmad Sadeghi, David Naccache, 55-78, 2010, Springer. DOI: 10.1007/978-3-642-14452-3_3.
Journal Publications:
2. Bilgiday Yuce, Chinmay Deshpande, Marjan Ghodrati, Abhishek Bendre, Leyla Nazhandali, Patrick Robert Schaumont, “A Secure Exception Mode for Fault-Attack-Resistant Processing,” IEEE Transactions on Dependable and Secure Computing, April 2018, (14 pages) doi:10.1109/TDSC.2018.2823767
3. Bilgiday Yuce, Nahid Farhady Ghalaty, Chinmay Deshpande, Harika Santapuri, Conor Patrick, Leyla Nazhandali, Patrick Schaumont, "Analyzing the Fault Injection Sensitivity of Embedded Software," ACM Transactions on Embedded Computing Systems, 16(4), Article 95, September 2017 (25 pages). doi: 10.1145/3063311
4. Meeta Srivastav, Leyla Nazhandali, “Design of Ultra-Low Power Scalable-Throughput Many-Core DSP Applications”, ACM Transactions on Design Automation of Electronic Systems (TODAES) V 20, Issue 3, Article 34 (June 2015), (21 pages)
5. Apoorva Garg, Muhammad Akbar, Eric Vejerano, Shree Narayanan, Leyla Nazhandali, Linsey C Marr, Masoud Agah, “Zebra GC: A mini gas chromatography system for trace-level determination of hazardous air pollutants”, Journal OF Sensors and Actuators B: Chemical, Volume 212, Pages 145-154, 2015 (10 pages)
6. Rafeei, L., Henry, M.B., Nazhandali, L., “Fast Approximation Framework for Timing and Power Analysis of Ultra-Low-Voltage Circuits”, IEEE transactions on Circuits and Systems I, Volume 60, Issue 6, June 2013, pgs. 1501-1510 (10 pages)
7. Henry, M.B., Nazhandali, L., "NEMS-Based Functional Unit Power-Gating: Design, Analysis, and Optimization", IEEE transaction on Circuits and Systems I, Volume 60, issue 2, 2013, pgs. 290-302 (13 pages)
8. Meeta Srivastav, Xu Guo, Sinan Huang, Dinesh Ganta, Michael B Henry, Leyla Nazhandali, Patrick Schaumont, “Design and benchmarking of an ASIC with five SHA-3 finalist candidates”, Microprocessors and Microsystem, Volume 37, Issue 2, March 2013, Pages 246–257 (12 pages)
9. Meeta Srivastav, Michael B Henry, Leyla Nazhandali, “Design of energy-efficient, adaptable throughput systems at near/sub-threshold voltage”, ACM Transactions on Design Automation of Electronic Systems (TODAES), 2013, Volume 18, Issue 1 (23 pages)
10. Michael Henry, Leyla Nazhandali, ″From Transistors to NEMS: Highly Efficient Power Gating of CMOS Circuits″, ACM Journal of Emerging Technologies, Vol. 8, No. 1, Article 2, February 2012 (19 pages)
11. Bo Zhai, Sanjay Pant, Leyla Nazhandali, Scott Hanson, Javin Olson, Ann Reeves, Michael Minuth, Ryan Helfand, Todd Austin, Dennis Sylvester, David Blaauw, ″Energy Efficient Subthreshold Processor Design,″ IEEE Transactions on Very Large Scale Integration Systems (T-VLSI), Vol. 17, No. 8, August 2009, pgs. 1127 - 1137. (11 pages)
12. Michael B. Henry, Leyla Nazhandali, ″Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture, ″ Transactions on HiPEAC: Volume 4, Issue 2. (15 pages)
13. Scott Hanson, Bo Zhai, Mingoo Seok, Brian Cline, Kevin Zhou, Meghna Singhal, Michael Minuth, Javin Olson, Leyla Nazhandali, Todd Austin, Dennis Sylvester, David Blaauw, ″Exploring Variability and Performance in a Sub-200 mV Processor″, IEEE Journal of Solid-State Circuits (JSSC), Invited Paper to the Special Issue on VLSI Circuits, Vol. 43, No. 4, April 2008, pgs. 881-891. (11 pages)
Peer-reviewed Conference Publications:
14. Marjan Ghodrati, Bilgiday Yuce, Surabhi Gujar, Chinmay Deshpande, Leyla Nazhandali, Patrick Schaumont, "Inducing local timing fault through EM injection,” 2018 Design Automation Conference (DAC), San Francisco, CA, June 2018.
15. Deshpande, B. Yuce, P. Schaumont and L. Nazhandali, "Employing Dual-complementary Flip-Flops to Detect EMFI Attacks," 2017 Asian Hardware Oriented Security and Trust Symposium (AsianHOST), Beijing, CN, October 2017.
16. Deshpande, C., Yuce, B., Ghalaty, N. F., Ganta, D., Schaumont, P., & Nazhandali, L. (2016). A Configurable and Lightweight Timing Monitor for Fault Attack Detection. In 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) (pp. 461-466). Pittsburgh, PA: IEEE. doi:10.1109/ISVLSI.2016.123
17. Bilgiday Yuce, Nahid F Ghalaty, Chinmay Deshpande, Conor Patrick, Leyla Nazhandali, Patrick Schaumont (2016) Fame: Fault-attack aware microprocessor extensions for hardware fault detection and software fault response. ACM Proceedings of the Hardware and Architectural Support for Security and Privacy 2016
18. Meeta Srivastav, Leyla Nazhandali, “Study of the impact of aging on many-core energy-efficient DSP systems”, 16th International Symposium on Quality Electronic Design (ISQED), March 2015
19. Ganta, D., Nazhandali, L., "Study of IC aging on ring oscillator physical unclonable functions," 15th International Symposium on Quality Electronic Design (ISQED), pp.461,466, 3-5 March 2014
20. Ganta, D., Nazhandali, L., "Circuit-level approach to improve the temperature reliability of Bi-stable PUFs," 15th International Symposium on Quality Electronic Design (ISQED), pp.467,472, 3-5 March 2014
21. Mehrdad Khatir, Leyla Nazhandali, “Sense Amplifier Pass Transistor Logic for energy efficient and DPA-resistant AES circuit”, 15th International Symposium on Quality Electronic Design (ISQED), pp 517-522, 3-5 March 2014
22. Desai, A. R., Ganta, D., Hsiao, M. S., Nazhandali, L., Chao, W., & Hall, S., “Anti-counterfeit Integrated Circuits using fuse and tamper-resistant time-stamp circuitry”, IEEE International Conference on Technologies for Homeland Security (HST), November 2013
23. M. Srivastav, Y. Zuo, X. Guo, L. Nazhandali, P. Schaumont, "Study of ASIC Technology Impact Factors on Performance Evaluation of SHA-3 Candidates", 23rd Great Lakes Symposium on VLSI (GLSVLSI), Paris, France, May 2013
24. Rashmi Moudgil, Dinesh Ganta, Leyla Nazhandali, Michael Hsiao, Chao Wang, Simin Hall, “A novel statistical and circuit-based technique for counterfeit detection in existing ICs”, Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI, Paris, France, May 2013
25. Dinesh Ganta, Leyla Nazhandali, “Easy-to-build Arbiter Physical Unclonable Function with enhanced challenge/response set”, 14th International Symposium on Quality Electronic Design (ISQED), March 2013
26. Avinash R Desai, Michael S Hsiao, Chao Wang, Leyla Nazhandali, Simin Hall, “Interlocking obfuscation for anti-tamper hardware”, Proceedings of the Eighth Annual Cyber Security and Information Intelligence Research Workshop, January 2013
27. M.B. Henry, L. Nazhandali, ″Design Techniques for Functional-Unit Power Gating in the Ultra-Low-Voltage Region″, 17th Asia and South Pacific Design Automation Conference (ASP-DAC), Sydney, Australia, January 2012 (Acceptance rate: 30%)
28. Xu Guo, Meeta Srivastav, Sinan Huang, Dinesh Ganta, Michael B. Henry, Leyla Nazhandali, Patrick Schaumont, ″ASIC Implementations of Five SHA-3 Finalists″, Design, Automation & Test in Europe Conference, Dresden, Germany, March 2012 (Acceptance rate: 28%)
29. Meeta Srivastav, Leyla Nazhandali, “Design and analysis of multi-core homogeneous systems for energy harvesting applications”, 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Seville, Spain, December 2012
30. Meeta Srivastav, Michael B Henry, Leyla Nazhandali, “Design of low-power, scalable-throughput systems at near/sub threshold voltage”, 13th International Symposium on Quality Electronic Design (ISQED), San Jose, CA, March 2012
31. M.B. Henry, M. Srivastav, L. Nazhandali, ″A Case for NEMS-Based Functional-Unit Power Gating of Low-Power Embedded Microprocessors″, Design Automation Conference, San Diego, CA, June 2011. (Acceptance rate: 25%)
32. X. Guo, M. Srivastav, S. Huang, D. Ganta, M. Henry, L. Nazhandali, P. Schaumont, "VLSI Characterization of SHA-3 Finalists,"14th Euromicro Conference on Digital System Design (DSD 2011), Oulu, Finland, August 2011. (Acceptance rate: 50%)
33. X. Guo, M. Srivastav, S. Huang, D. Ganta, M. Henry, L. Nazhandali, P. Schaumont, "Silicon Implementation of SHA-3 Finalists: BLAKE, Grostl, JH, Keccak, Skein," Ecrypt II Hash Workshop 2011, Tallinn, Estonia, May 2011. (Acceptance rate: 60%)
34. D. Ganta, V. Vivekraja, K. Priya, L. Nazhandali, "A Highly Stable Leakage-Based Silicon Physical Unclonable Function", 24th International Conference on VLSI Design (VLSI Design), Chennai, India, Jan 2011. (Acceptance rate 23%)
35. M. Henry, R. Lyerly, L Nazhandali, A. Fruehling, D. Peroulis, "MEMS-Based Power Gating for Highly Scalable Periodic and Event-Driven Processing", 24th International Conference on VLSI Design (VLSI Design), Chennai, India, Jan 2011. (Acceptance rate 23%)
36. V. Vivekraja, L. Nazhandali, ″Feedback Based Supply Voltage Control for Temperature Variation Tolerant PUFs″, 24th International Conference on VLSI Design (VLSI Design), Chennai, India, Jan 2011. (Acceptance rate 23%)
37. X. Guo, S. Huang, L. Nazhandali, P. Schaumont, "Fair and Comprehensive Performance Evaluation of 14 Second Round SHA-3 ASIC Implementations", NIST 2nd SHA-3 Candidate Conference, Santa Barbara, CA, August 2010.
38. K. Kobayashi, J. Ikegami, M. Knezevid, X. Guo, S. Matsuo, S. Huang, L. Nazhandali, U. Kocabas, J. Fan, A. Satoh, I. Verbauwhede, K. Sakiyama, K. Ota, "A Prototyping Platform for Performance Evaluation of SHA-3 Candidates", IEEE International Symposium on Hardware-Oriented Security and Trust (HOST2010) , June 2010. (Acceptance rate: 33%)
39. Henry, M.B., Nazhandali, L., ″From Transistors to MEMS: Throughput Aware Power-Gating in CMOS Circuits,″ Design, Automation & Test in Europe Conference, 2010. DATE '10. , pp.130-136, Dresden, Germany, 8-12 March 2010. (Acceptance rate: 30%)
40. Vignesh Vivekraja, Leyla Nazhandali, ″Circuit-Level Techniques for Reliable Physically Uncloneable Functions″, IEEE International Workshop on Hardware-Oriented Security and Trust (HOST 2009), San Francisco, CA, USA, July 2009. (Acceptance rate: 35%)
41. Bell, S. Raman, A. MacKenzie, P. Plassmann, C. Wyatt, L. DaSilva, L. Nazhandali, M. Agah, ″Increasing the Enrollment, Retention and Satisfaction of First-Year Students in Electrical Engineering, Computer Engineering, and Computer Science,″ ASEE Annual Conference, Austin, TX, June 14-17, 2009.
42. M.B. Henry, S. Griffin, and L. Nazhandali, ″Fast simulation framework for subthreshold circuits″, IEEE International Symposium on Circuits and Systems, Taipei, Taiwan, May 2009. (Acceptance rate: 45%)
43. M. B. Henry and L. Nazhandali, Hybrid super/subthreshold design of a low power scalable-throughput FFT architecture, volume 5409 of Lecture Notes in Computer Science, pages 278-292, Springer Berlin / Heidelberg, 2009. (Acceptance rate 28%)
44. Michael Henry, Syed Imtiaz M Haider, Leyla Nazhandali, ″A Low-Power Parallel Implementation of Discrete Wavelet Transform using Subthreshold Voltage Technology″, Architecture and Synthesis for Embedded Systems (CASES), Atlanta, GA, October 2008. (Acceptance rate: 42%, Nominated for Best Paper)
45. Syed Imtiaz M Haider, Leyla Nazhandali, ″Utilizing Sub-threshold Technology for the Creation of Secure Circuits,″ IEEE International Symposium on Circuits and Systems ISCAS, Seattle, Washington, USA, 18-21 May 2008. (Acceptance rate: 48%)
46. Syed Imtiaz M Haider, Leyla Nazhandali, ″A Hybrid Code Compression Technique using Bitmask and Prefix Encoding with Enhanced Dictionary Selection,″ International Conference on Compilers, Architecture and Synthesis for Embedded Systems CASES, Salzburg, Austria, Sep. 30-Oct. 5, 2007. (Full paper acceptance rate: 28%)
47. Scott Hanson, Bo Zhai, Mingoo Seok, Brian Cline, Kevin Zhou, Meghna Singhal, Michael Minuth, Javin Olson, Leyla Nazhandali, Todd Austin, Dennis Sylvester, David Blaauw, ″Performance and variability optimization strategies in a sub-200mV, 3.5pJ/inst, 11nW subthreshold processor,″ IEEE Symposium on VLSI Circuits (VLSI-Symp), June 2007.
48. Bo Zhai, Leyla Nazhandali, Javin Olson, Anna Reeves, Michael Minuth, Ryan Helfand, Sanjay Pant, David Blaauw, Todd Austin, ″A 2.60pJ/Inst. Subthreshold Sensor Processor for Optimal Energy Efficiency,″ IEEE Symposium on VLSI Circuits (VLSI-Symp), Honolulu, Hawaii USA, June 2006.
49. L. Nazhandali, M. Minuth, B. Zhai, and T. Austin, “SenseBench: Toward an Accurate Evaluation of Sensor Network Processors”, 2005 IEEE International Symposium on Workload Characterization IISWC’05, Austin, Texas USA, October 6-8, 2005.
50. L. Nazhandali, M. Minuth, B. Zhai, J. Olson, T. Austin, and D. Blaauw, “A Second-Generation Sensor Network Processor with Application-Driven Memory Optimizations and Out-of-Order Execution,” 2005 International Conference on Compilers, Architectures and Synthesis of Embedded Systems CASES’05, San Francisco, CA USA, September 24-27, 2005. (Acceptance rate: 30%)
51. L. Nazhandali, B. Zhai, R. Helfand, M. Minuth, J. Olson, S. Pant, A. Reeves, T. Austin, and D. Blaauw, “Energy Optimization of Subthreshold-Voltage Sensor Processors,” The 32nd Annual International Symposium on Computer Architecture ISCA’05, Madison, Wisconsin USA, June 4-8, 2005. (Acceptance rate: 15%)
52. L. Nazhandali and K. Sakallah, “Majority-Based Decomposition of Carry Logic in Binary Adders,” International Workshop on Logic Synthesis IWLS’02, June 2002, pp. 179-184.