12. W. Wei, K. Namba and F. Lombardi, “Design and Comparative Evaluation of a Hybrid Cache Memory at Architectural Level,” Proceedings of IEEE/ACM Great Lakes Symposium on VLSI 2016, Pages 125-128, 2016.
11. W. Wei, K. Namba, Y. B. Kim and F. Lombardi, “A Novel Scheme for Tolerating Single Event/Multiple Bit Upsets (SEU/MBU) in Non-Volatile Memories,” IEEE Transactions on Computers, Volume 65, Issue 3, Pages 781-790, 2015.
10. W. Wei, K. Namba and F. Lombardi, “Hybrid Designs for Non-Volatile Embedded Memory Cells,” 15th International Conference on Nanotechnology, Pages 1206-1209, 2015.
9. W. Wei, K. Namba and F. Lombardi, “Novel Designs of Embedded Hybrid Cells for High Performance Memory Circuits,” Proceedings of IEEE/ACM Great Lakes Symposium on VLSI 2015, Pages 91-94, 2015.
8. W. Wei, K. Namba and F. Lombardi, “Designs and Analysis of Non-Volatile Memory Cells for Single Event Upset (SEU) Tolerance,” Proceedings of IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems 2014, Pages 69-74, 2014.
7. W. Wei, K. Namba, J. Han and F. Lombardi, “Design of a Non-Volatile 7T SRAM Cell for Instant-on Operation,” IEEE Transactions on Nanotechnology, Volume 13, Issue 5, Pages 905-916, 2014.
6. W. Wei, K. Namba and F. Lombardi, “New 4T-Based DRAM Cell Designs,” Proceedings of IEEE/ACM Great Lakes Symposium on VLSI 2014, Pages 199-204, 2014.
5. W. Wei, J. Han and F. Lombardi, “Robust HSPICE Modeling of a Single-Electron Turnstile,” Microelectronics Journal, Volume 45, Issue 4, Pages 394-407, 2014.
4. W. Wei, K. Namba and F. Lombardi, “Extending Non-Volatile Operation to DRAM Cells,” IEEE Access, Volume 1, Pages 758-769, 2013.
3. W. Wei, J. Han and F. Lombardi, “Design and Evaluation of a Hybrid Memory Cell by Single-Electron Transfer,” IEEE Transactions on Nanotechnology, Volume 12, Issue 1, Pages 57-70, 2012.
2. W. Wei, J. Han and F. Lombardi, “Modeling a Single Electron Turnstile in HSPICE,” Proceedings of IEEE/ACM Great Lakes Symposium on VLSI 2012, Pages 221-226, 2012.
1. W. Wei, J. Han and F. Lombardi, “A Hybrid Memory Cell Using Single-Electron Transfer,” Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures 2011, Pages 16-23, 2011.