Ph.D. – Computer Engineering at Northeastern University, Boston, MA, 2014
Dissertation: Novel Paradigms and Designs of Nanometric Memories
M.S. – Electrical & Computer Engineering at Northeastern University, Boston, MA, 2011
B.S. – Applied Physics at Beihang University (BUAA), Beijing, China, 2009
Block level STA and Power Estimations
Standard Cells, Custom Digital IPs and IO pads Characterizations
Memory Design, Low Power Circuit Design, Hardening Design, EMIR Analysis
Fault-Tolerance Optimization, Error Correction Coding
Emerging Technology (ReRAM, FRAM, MRAM)
VLSI Design Flow Automation