Madhava Vemuri, Ph.D.
Please have the following path to the process design kit (PDK) listed in the .bashrc file
########################################
#.bashrc file
# Created by: Madhava Vemuri
# Date : 10/29/25
#########################################
# Setup the Synopsys License
export LM_LICENSE_FILE=27020@XX.XX.XX
# Add path to Customcompiler binaries
export PATH="$PATH:/usr/synopsys/customcompiler/X-2025.06-4/bin"
# Add path to Primesim binaries
export PATH="$PATH:/usr/synopsys/primesim/X-2025.06-2/bin"
# Add path to HSPICE binaries
export PATH="$PATH:/usr/synopsys/hspice/X-2025.06-2/hspice/bin"
# Add path to Waveview binaries
export PATH="$PATH:/usr/synopsys/wv/X-2025.06-3/bin"
# Path to the SAED 32nm PDK library
export SAED32_28_PDK='/home/software/libraries/SAED/32nm/PDK/SAED32nm_PDK_02_2024'
Please ensure the PDK library path is added to the "lib.defs" file in the WorkDir. This file is automatically created when the custom_compiler tool is invoked for the first time. If this file is missing in your current working directory, invoke the tool first. Please add the following lines to the "lib.defs" file, without disturbing the prior lines
DEFINE SAED_PDK_32_28 $SAED32_28_PDK/SAED_PDK_32_28
ASSIGN SAED_PDK_32_28 libMode shared
ASSIGN SAED_PDK_32_28 PDKLib true
DEFINE reference ./reference
Open the "Library Manager" application from the custom_compiler homepage. You should find the PDK listed here in the manager.
To create a new library, please go to the toolbar and select File > New > Library
A library creation window will be opened. Please give an appropriate name for the library. In this instance, we refer to it as "SAED32_STD_Cell". Include the technology using the drop box select the PDK library you have just added. Click "OK" to finalize the changes.
Name: SAED32_STD_Cell
Technology: "SAED_PDK_32_28"
Upon the successful creation of the library, you should see a new library just listed on the library manager
To create a new library, please go to the toolbar and select File > New > Cell
A new cell creation window will be opened. Please give an appropriate cell name. In this instance, we refer to it as "INV1X1". Click "OK" to finalize the changes.
Cell Name: INV1X1
Upon the successful creation of the library, you should see a new cell just listed on the library manager under the Cells pane
Here are some of the shortcuts to help you with the schematic editor
Mouse Wheel + up
Mouse Wheel + down
Keyboard 'f' key
Keyboard 'i' key
Keyboard 'w' key
Keyboard 'p' key
Keyboard 'c' key
Keyboard 'Shift + X' key
Keyboard 'm' key
Keyboard 'q' key
Keyboard 'u' key
Keyboard 'l' key
Zoom in
Zoom Out
Zoom full
Create a new instance
Create a net/wire
Create a Pin
Copy an instance
Check and Save
Move the instance or selection
Property Editor
Undo an editor move
Create wire name
To create a new cell view, please go to the toolbar and select File > New > Cellview
A new cell view window will be opened. Please select the cell you want to create a new view. Select the view name "schematic" and the appropriate editor "schematic editor" will be automatically selected. Click "OK" to save the changes. A schematic editor will be opened.
Consider the following inverter circuit schematic, where the widths of the NMOS and PMOS devices are represented as Wn/Ln and Wp/Lp. For this instance assume Wn & Wp = 0.1u and Ln & Lp = 30n
To add an instance of the nmos device from the PDK library, select Create a new device or use keyboard shortcut "i" to invoke the window. Select the "nmos4t" using the dropdown menu and use the mouse the place the device on the schematic editor window
Create an instance of the pmos device using instance "pmos4t" from the PDK library. Create the instances of "vdd" and "gnd" from the "analoglib" library.
Create a net or wires using keyboard shortcut "w" or Add > Wire. Create Connections based on the circuit schematic above. The body terminals of the PMOS and NMOS are connected to VDD or GND, so they are connected to the source terminals. This is not always the case, where source terminals could be connected to other transistors, then you need to connect them to VDD and GND separately.
Create a pin using keyboard shortcut "p" or Add > Pin. Please specify the pin name and the terminal type in the pin section. Here pin name "A" is created of terminal type "input", and "Y" is created of terminal type "output".
Check and Save the schematic to make sure no mistakes have been made and the design is error-free. You have now successfully created your schematic
To create a symbol, use the new cell view. Please go to the toolbar and select File > New > Cellview in the library Manager. Click "OK" to apply these changes, and the symbol editor tool will be opened.
Create a new shape using "Add Shape" by selecting Tools > Add > Shape or pressing keyboard shortcut "Shift + P". The Shape toolbar is seen on the top. Here we are creating a inverter symbol, so we are using straight line to create 3 lines in the inverter. Double click on the edge to close the loop and create a triangle shape. A circle shape is added on the right most end. New wires are created to create the ports.
Create pins to show the input and output terminals, and place them on the symbol. Check and Save to ensure the symbol is created correctly and there are no rule violations.
To run the transient or DC analysis, first we need to create a test bench. This can be made in another cell in the library manager. For this instance, we call it "INV1x1_tb".
Create a new schematic cell view for the test bench. This opens an empty schematic editor. Create an instance of the previously created cell (INV1X1) in the editor using the add instance window. This time you should see the symbol of inverter when you drag and drop the instance.
To run the DC analysis, add the instances of the DC voltage source for input and VDD from the analogLib library. For the DC voltage source for power rails, create instances of "vdd" and "gnd" from the same library. Let the DC voltage be a parameter for now and be "VDD".
Create a DC voltage source for input, let the DC voltage be a parameter "Vin". Create a gnd terminal and connect the nets using wire tool. You can also name the wire using the property editor or label tool. If the exclamation is used ' ! ' at the end of the wire label, it is treated as global wire and the warning related to 'floating' are suppressed. Since the inverter output is not connected to a port, this wire is treated a floating. That's why we use "Out!" to suppress the 'floating' warning.
To run the DC simulations, go to Tools > Primewave. It opens the primewave tool for the test bench. At the moment, it will be empty. We need in insert the variables and add the analysis for the DC simulations
You can import the variables from the design using the Variables option in the toolbar. From the toolbar bar select Variables > Copy from Design or use the keyboard shortcut "Shift + V". This will add the variables from the schematic. Give a nominal value in this case which is '1.05'
To add the DC analysis, go to Setup > Analyses or use the keyboard shortcut 'A'. A new window opens, listing different analysis types. Please select the 'dc' and choose the sweep option. Using the drop-down menu in the Sweep Variable, select the Design Variable. For the variable, select the 'Vin'. The start and stop ranges could be specified between '0' and '1.05'. The number os steps could be 10 for our case. Click 'OK' to save the current selection. You should see the analysis is listed in the analysis pane.
You need to add the model files in order to run the simulation. To add the model files, Setup > Model Files or use the keyboard shortcut 'M'. A new window opens. Please click to add the model file path. You can either browse or type the path. Use 'SS' section to select the model.
/home/software/libraries/SAED/32nm/PDK/SAED32nm_PDK_02_2024/hspice/saed32nm.lib
Please ensure the environment has been correctly set up. We are using the Primesim software to run the simulations. First, please go to Setup > Simulator and verify that PrimeSim is selected as the Simulator. Second, please check if the following Environment Options are present; if not, specify them.
Finally, make sure in the Simulation > Options settings, the Primesim Hspice is selected. Click OK to save the current options
You can add the outputs that you would like to visualize. You can add them from design by selecting the following option from the toolbar, Outputs > Add from Design, or using the keyboard shortcut "Ctrl + P". Use the mouse to select the nets that you want to be plotted. Select the node terminal to monitor the current through that node. It is not used in our current use case. When you select the nets, they are automatically listed on the Primewave Outputs pane. You can also add an expression to extract metrics such as average power and delay, and monitor them here.
Click Netlist and Run to execute the simulation. It opens another job monitor. Once the job is finished running, it automatically pops up the plot.
You can save the state and load it later to preserve the settings you have made so far. To save the state, please select Session > Save State
Create a pulse voltage source 'vpulse' for input, let the DC voltage be a parameter "Vin". Create a gnd terminal and connect the nets using wire tool. You can replace the input DC voltage source with the transient voltage source. Please fill in the following fields place it to the inputs port. Check and Save to ensure the design is error free.
In the Primewave analysis, select the transient analysis "tran". Please fill in the Start Time, Stop Time and Time Step, with appropriate values.
Click Netlist and Run to execute the simulation. It opens another job monitor. Once the job is finished running, it automatically pops up the plot.