UNIST Nanoelectronics and Advanced Packaging Lab (UNL)

UNL is a multidisciplinary research team composed of experts in electrical engineering, semiconductor physics, linear and electronic circuits, microwave engineering, materials science, and chemical engineering. We are developing cutting-edge electronic technologies that will shape the future, including logic transistors, memory components, RF metasurfaces, and advanced packaging.

UNL은 전자기학, 반도체물리, 선형 및 전자 회로, 초고주파공학, 재료 과학, 화학공학을 기반으로 구성된 다학제 연구 팀입니다. 우리는 미래를 변화시킬 첨단 전자 기술들 (로직 트랜지스터, 메모리 소자, RF 메타표면, 첨단패키징)을 개발하고 있습니다. UNL 연구의 지향점은 '이종집적 (Heterogeneous Integration)' 기술개발에 있습니다. 두 가지 이종집적 기술, '단일3차원집적 (Monolithic 3D Integration, M3D)'과 '첨단패키징'을 통한 미래반도체시스템의 성능 향상에 대해 연구합니다.

JOIN US!

We are seeking bright, motivated students and scholars to join our research group. A strong work ethic, camaraderie, passion, and a healthy, proactive attitude are essential for success in our team. Our research spans a wide range of fields including logic/memory/RF devices, M3D systems, and packaging. We welcome researchers from diverse backgrounds such as electrical engineering, materials science, mechanical engineering, chemical engineering, chemistry, and physics. If you are interested in pursuing a postdoctoral position, a PhD or integrated PhD program (with preference given to PhD candidates or integrated programs), or an internship, please send your CV, transcripts, and any relevant research materials to jmkwon@unist.ac.kr.

우리 연구실은 긍정적이며, 스스로 동기 부여를 할 수 있는 학생과 연구자를 찾고 있습니다. 특히 윤리 의식, 동료애, 열정, 그리고 건강하고 주체적인 태도가 필수적입니다. 우리 연구는 로직/메모리/RF 소자, M3D 시스템, 첨단 패키징 등 폭넓은 분야를 아우르며, 전기공학, 재료공학, 기계공학, 화학공학, 화학, 물리학 등 다양한 배경을 가진 연구자들로 이루어져 있습니다. 박사후연수, 석사 또는 통합 박사 과정 (박사 또는 통합 과정 우선 선발)에 관심이 있는 분들은 CV, 성적표, 연구 활동 자료를 jmkwon@unist.ac.kr로 이메일로 보내주시기 바랍니다. *공간 문제로 현재 인턴은 받지 못하지만, 진학 상담은 가능합니다

1. Chiplet Package Substrate and System Design/Manufacturing / Chiplet 패키지 기판 및 시스템 설계/제작
   : Preference will be given to candidates with experience in packaging materials/processes, IO circuit and digital system design, EMI/EMC design, and PCB design.

   • Multichip Packaging Glass Substrate Process Development + RDL SI/PI Design + Panel-Level Packaging RDL Plating and PID Process Using Large-Area Printing Processes

   • Design and Fabrication of Free-Form Package Substrates (Organic/Glass/Ceramic) Using 3D Printing

2. RF System Packaging / RF 시스템 패키징
   : Preference will be given to candidates with experience in packaging materials/processes, RF measurements, EM simulation (CST/HFSS, etc.), antenna design, and RF transceiver (TRX) design.

   • Novel Device-Based Analog/RF Integrated Circuits + Glass Substrate RF System Packaging (Including RF Power Amplifier Design)

   • Design and Fabrication of Large-Area Intelligent Reflecting Surfaces Based on Ion RF Varactors + AI Algorithm-Based Intelligent Reflecting Surface Beamforming

3. Monolithic 3D Integration (1): 1D and 2D Logic Device and System Design/Manufacturing
   : Preference will be given to candidates with experience in low-dimensional transistor processes, digital IC EDA, PDK development, and TCAD/Cadence.

   • Fabrication of Two-Dimensional TMD Semiconductor Devices and Standard Cell-Based Logic Synthesis + Development of Novel Device-Based M3D AI Accelerators and Parallel Processing Processors (Novel Device Digital Circuit Design)

   • CNT Large-Area Alignment Process and Nanochannel GAA FET Fabrication + Monolithic 3D Integration Process and Three-Dimensional Structured Devices (e.g., CFET)

4. Monolithic 3D Integration (2): Oxide Semiconductor DRAM Device and System Design/Manufacturing
   : Preference will be given to candidates with experience in oxide semiconductor transistor processes, memory readout circuits, or memory macro design.

   • Vertical Channel Oxide Semiconductor ALD Thin-Film Process for High-Density, Low-Power DRAM

   • AI Device Design and Memory Array Fabrication + High-Density Memory Computing Circuit Design (Compute-in-Memory)

May 1, 2025

updated by Jimin Kwon