Research area
Research area
EDA for stacked IC architectures
EDA for stacked IC architectures
3D ICs (TSV-based / Hybrid-bonding / Monolithic)
2.5D ICs (Interposer + chiplets)
Design / DTCO for advanced technology
Design / DTCO for advanced technology
DRV-aware design under deep sub-micron area
Design solutions for beyond-5nm technologies
Cross-optimizations: DTCO/STCO
AI/ML application (AI -> EDA)
AI/ML application (AI -> EDA)
Design quality prediction & optimization with deep learning
Design automation with reinforcement learning
EDA/CAD for AI chip design (EDA -> AI)
EDA/CAD for AI chip design (EDA -> AI)
Physical design for neuromorphic computing architecture
Physical design for process-in-memory (PIM) architecture
Logic-in-Memory (LiM): Mapping & physical design