The Semiconductor Design Automation (SeDA) lab. is in the Dept. of Electrical Engineering at Ulsan National Institute of Science and Technology (UNIST).
SeDA lab. focuses on researching and developing computer-aided design (CAD) solutions for SoC & VLSI. Our goal is to build electronic design automation (EDA) frameworks for cutting-edge digital IPs/chips with short time-to-market (TTM) and optimized power, performance, area, and cost (PPAC). We are extending our research coverage in the direction of (1) next-generation integrated chip (IC) structures, such as 3D ICs, chiplet-based 2.5D ICs, and under advanced technology nodes; and (2) EDA with AI in both directions: AI for EDA (AI/ML application to EDA) and EDA for AI (EDA framework for AI chip design)
We welcome good-natured and self-motivated students to join us as Post-doctoral researchers, graduate students, and undergraduate interns, and enjoy a fun graduate school life with interesting research topics! (Click here.)
News (2024.3 ~)
(2025.1) Prof. Heechun Park hosted an online class for IDEC campus titled "Standard Cell Based Design (RTL-to-GDSII)". (Jan. 13 ~ Jan. 14)
(2025.1) [Welcome!] Jiwon joined our lab as a research intern. (U-WURF program: Jan. 2 ~)
(2024.12) [Welcome!] Nayeon and Jiyun joined our lab as research interns. (Internship program: Dec. 23 ~)
(2024.11) Congratulations to Dhoui Lim on passing his M.S. defense! (Nov. 28)
(2024.11) Congratulations to Junghyun Yoon on passing his M.S. defense! (Nov. 28)
(2024.11) [Publication] Our paper "Timing-Driven Detailed Placement with Unsupervised Graph Learning" has been accepted to the Design, Automation and Test in Europe Conference (DATE) 2025. (Dhoui, Heechun)
(2024.10) [Publication] Our paper "Clustering-Driven Bonding Terminal Legalization with Reinforcement Learning for F2F 3D ICs" has been accepted to the Asia and South Pacific Design Automation Conference (ASP-DAC) 2025. (Gyumin, Heechun)
(2024.9) [Welcome!] Geon-Hyeong joined our lab as a B.S. visiting researcher.
(2024.9) [Publication] Our paper "PPA-Aware Tier Partitioning for 3D IC Placement with ILP Formulation" has been accepted to the Asia and South Pacific Design Automation Conference (ASP-DAC) 2025. (Heechun)
(2024.9) [Welcome!] Jiwoo joined our lab as a research intern. (Internship program: Sep. 2 ~ Dec. ?)
(2024.9) [Welcome!] Gangmin, Hyunmin, Sojung, Ikkyum, and Gyumin have been promoted to MS&PhD candidates in our lab!
(2024.8) Prof. Heechun Park presented a tutorial at the International SoC Design Conference (ISOCC) 2024, titled "Introduction to VLSI and Electronic Design Automation". (Aug. 19)
(2024.8) [Publication] Our paper "Memristive Logic-in-Memory Implementation with Area Efficiency and Parallelism" has been accepted to the International Conference on Computer Design (ICCD) 2024. (Ikkyum, Heechun)
(2024.8) [Project] We won the grant for a 6-year NRF project titled "Plug & Play (P&P) Chiplet Integration Research Center". (Prof. Park as co-PI)
(2024.7) Prof. Heechun Park hosted an online class for IDEC academy titled "Standard Cell Based Design (RTL-to-GDSII)". (July 4 ~ July 5)
(2024.7) [Welcome!] 3 undergraduate students (Gaeun, Donghee, Yeonwoo) joined our lab as research interns. (U-SURF program: July 3 ~ July 30)
(2024.6) [Welcome!] 3 undergraduate students (Hyun Jun, Yoon Seo, Yeongchae) joined our lab as research interns. (Internship program: June 17 ~ Aug. 16)
(2024.5) [Publication] Our paper "3T1R Memristor Crossbar Architecture for Diverse Logic Implementation" has been accepted to the International SoC Design Conference (ISOCC) 2024. (Ikkyum, Heechun)
(2024.5) [Publication] Our paper "Double-Row Flip-flop Design Under Advanced Technology and Its IC-Level Effects" has been accepted to the International SoC Design Conference (ISOCC) 2024. (Yoonjae, Heechun)
(2024.4) [Project] We won the grant for a 5-year NRF project titled "Research on True-3D Design Automation Framework for 3D ICs". (Prof. Park as PI)
(2024.3) Prof. Heechun Park has been moved to the Department of Electrical Engineering at UNIST.
News (2022.9 ~ 2024.2)
(2024.2) [Publication] 논문 "DTOC-P: Deep-learning-driven Timing Optimization using Commercial EDA Tool with Practicality Enhancement"이 학술지 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)에 accept 되었습니다. (박희천)
(2024.2) [Award] 박소정 학생이 KCS 2024에서 학부생 포스터 세션 현장우수포스터상을 수상했습니다. (Title: Timing-aware Tier Partitioning for 3D ICs with Critical Path Consideration)
(2024.1) [Publication] 논문 "Comprehensive Physical Design Flow Incorporating 3D Connections for Monolithic 3D ICs"이 학술지 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)에 accept 되었습니다. (박희천)
(2024.1) [Publication] 논문 "Design-Technology Co-Optimization with Standard Cell Layout Generator for Pin Configurations"이 학술대회 International Symposium on Quality Electronic Design (ISQED) 에 accept 되었습니다. (윤정현, 박희천)
(2024.1) [Publication] 논문 "Graph Neural Network-Based Detailed Placement Optimization Framework"이 학술대회 International Symposium on Quality Electronic Design (ISQED) 에 accept 되었습니다. (임도의, 박희천)
(2024.1) [Welcome!] 이윤재 학생이 학부연구생으로 연구실에 합류하였습니다.
(2023.12) [Publication] 총 6편의 발표 (구두발표 2편, 포스터발표 4편)가 학술대회 Korean Conference on Semiconductors (KCS) 에 accept 되었습니다. (윤정현, 임도의, 전강민, 조현민, 박소정, 김익겸, 박희천)
(2023.11) [Publication] 논문 "Timing-Aware Tier Partitioning for 3D ICs With Critical Path Consideration"이 학술대회 International Conference on Electronics, Information, and Communication (ICEIC) 에 accept 되었습니다. (박소정, 박희천)
(2023.10) 박희천 교수가 반도체공학회 가을학교에서 "반도체 EDA 및 CAD의 기초" 주제로 강의를 진행하였습니다. (10/6)
(2023.9) [Welcome!] 김규민 학생이 학부연구생으로 연구실에 합류하였습니다.
(2023.7) 박희천 교수가 광운대학교 IDEC 캠퍼스에서 "2.5D chiplet 설계를 위한 CAD 알고리즘 활용" 강의를 진행하였습니다. (7/17-7/18)
(2023.7) [Welcome!] 김동휘 학생이 학부연구생으로 연구실에 합류하였습니다.
(2023.6) 학생연구실이 배정되었습니다. (국민대학교 미래관 506-2호)
(2023.5) 박희천 교수가 SoC 학술대회의 신임교수 세션에서 "3차원 집적회로의 설계 자동화 및 최적화" 주제로 초청발표를 진행하였습니다. (5/13)
(2023.4) [Welcome!] 김익겸 학생이 학부연구생으로 연구실에 합류하였습니다.
(2023.3) [Welcome!] 윤정현, 임도의 학생이 석사과정으로 연구실에 합류하였습니다.
(2022.12) [Welcome!] 임도의 학생이 학부연구생으로 연구실에 합류하였습니다.
(2022.12) [Publication] 논문 "Eliminating Minimum Implant Area Violations With Design Quality Preservation"이 학술지 IEEE Transactions on Very Large Scale Integration Systems (TVLSI)에 accept 되었습니다. (박희천)
(2022.11) [Publication] 논문 "DTOC: integrating Deep-learning driven Timing Optimization into the state-of-the-art Commercial EDA tool"이 학술대회 Design, Automation and Test in Europe Conference (DATE)에 accept 되었습니다. (박희천)
(2022.11) [Welcome!] 윤정현, 이승원, 전강민, 조현민, 이혜원, 박소정, 이민승, 최정환, 문지원, 이가온 학생이 학부연구생으로 연구실에 합류하였습니다.
(2022.10) 연구실 (SeDA Lab.) 홈페이지가 개설되었습니다.
(2022.9) 박희천 교수가 국민대학교 창의공과대학 전자공학부 조교수로 임용되었습니다.
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