A collection of academic and personal projects that reflect my curiosity, creativity, and hands-on approach to learning electronics and system design.
In this project, I explored hardware security vulnerabilities using the ChipWhisperer Nano platform. The objective was to understand and implement various side-channel and fault injection attacks on microcontrollers. The project consisted of four major parts, each focusing on a distinct attack technique, combining both theoretical understanding and practical experimentation.
In this part, I performed a Differential Power Analysis attack to extract AES encryption keys from power traces. Using simulated traces, I successfully implemented the DPA attack and analyzed the correlation between power consumption and data-dependent operations. I plotted and interpreted differential traces to understand how the variations in power reveal secret information, and I also attempted the same approach on hardware traces to observe the practical limitations and noise effects.
The second part involved implementing a Correlation Power Analysis attack on a firmware-based AES encryption running on the target microcontroller. Unlike DPA, CPA uses statistical correlation to relate power measurements with hypothetical key values. I executed the attack using both simulated and real hardware traces, successfully recovering the AES encryption key. The resulting correlation plots validated the effectiveness of the CPA approach and deepened my understanding of power-based leakage in embedded systems.
In this part, I extended the power analysis technique to the PRESENT-80 lightweight block cipher. The goal was to perform a full CPA attack to retrieve an 80-bit secret key and decrypt an encrypted message. I developed a step-by-step methodology to identify the power model, align traces, and compute correlation coefficients. This part of the project emphasized handling a larger key space and comparing differences in attack strategy between AES and PRESENT-80 implementations. The final decrypted output confirmed the success of the attack.
The final part of the project focused on fault injection through voltage glitching. Instead of relying on power analysis, this attack intentionally disrupted the normal operation of the target device to cause misbehavior in program execution. I tuned glitch parameters such as offset and pulse width to manipulate the CPU timing and bypass password verification checks. Through iterative parameter sweeps, I identified a successful range that consistently caused the system to skip the password comparison, effectively demonstrating how a fault attack can compromise system security.
This project provided hands-on experience in both power analysis and fault injection techniques. I learned how side-channel information such as power consumption can leak sensitive data and how precise hardware manipulation can alter program flow. More importantly, it helped me understand how secure system design requires both algorithmic robustness and physical attack resistance to ensure data confidentiality and reliability.
Hardware: ChipWhisperer Nano
Software: Jupyter Notebook, Python, ChipWhisperer API, VirtualBox VM
Scope of Work: Completed all four parts, including power analysis and voltage glitching attacks, with independent implementation, analysis, and demonstration.
Project Summary:
This project involved the design and simulation of a 16×16 6-transistor (6T) SRAM array using HSPICE with 20 nm HP PTM-MG transistor models. The supply voltage was set to 0.9 V, and all transistors initially used 2 fins.
We performed transient simulations to demonstrate read and write operations for the memory cell located at the intersection of the 2nd row and 3rd column. Waveforms for the word line, bit line, and storage node voltage were analyzed to confirm correct functionality.
To study device-level design impacts, two parametric variations were explored:
Access Transistors: both designed with 10 fins (others 2 fins)
Pull-Down Transistors: both designed with 10 fins (others 2 fins)
These modifications revealed how transistor sizing influences read/write characteristics, cell stability, and performance. The project deliverables included all HSPICE codes (.sp files), simulation waveforms, and a comprehensive report summarizing the analysis.
During the COVID-19 pandemic, when classes were being conducted online, we, the teachers in Bangladesh, faced significant challenges in managing attendance. At that time, there was no dedicated attendance tracking software available in the country. We had to rely on chatboxes from online meeting platforms such as Google Meet and Zoom. Students entered their IDs in the chatbox, and after each class, we manually collected these unsorted IDs and entered them one by one into the university’s attendance system, a time-consuming and tedious process.
To address this problem, I developed a stand-alone Python application called Absent Student ID Extractor to automate the attendance process and reduce our workload.
Key Features:
No need to install Python: The application was built as a stand-alone executable for easy use.
Automatic generation of sorted lists: It produced organized lists of present, absent, and unregistered student IDs.
Platform compatibility: It worked seamlessly with chat logs from both Google Meet and Zoom.
User-friendly interface: A graphical user interface (GUI) was designed to make the tool intuitive and convenient for teachers without technical backgrounds.
Tools and Technologies Used:
Programming Language: Python
GUI Framework: Tkinter
Libraries: re (Regular Expressions), tkinter, os, and traceback
Distribution: Packaged as a stand-alone executable (no Python installation required)
This project significantly simplified the attendance management process during online classes, helping teachers in Bangladesh save time and maintain accurate attendance records efficiently.
All the features have been demonstrated in the following video:
Figure: Application Interface
Flexible carbon sensors detect the bending of fingers and send the corresponding signals to the microcontroller. The microcontroller then bends the fingers of the robotic hand according to these input signals. Servo motors are used to drive the movement of the robotic fingers.
Figure: Transmitter Circuit
Figure: Receiver Circuit
This laser communication system transmits sound or music signals through a laser beam. The intensity of the laser beam varies with the amplitude of the sound signal. This variation in intensity is converted into a corresponding variation in voltage by a micro solar panel. The voltage from the solar panel is then amplified using a low-voltage audio power amplifier and reproduced through a speaker.
In our project, we built a transmitter and receiver setup that converts an analog audio signal, via a standard 3.5 mm jack, and transmits it through a laser beam to the receiver, which converts it back into audio. The receiver can rotate horizontally using a servo motor controlled by an Arduino UNO to automatically align itself with the transmitter. The end result is a wireless audio link that cannot be intercepted or overheard by other devices.
Objective:
The objective of this project is to develop a system capable of detecting specific words within a parent speech signal and then omitting those targeted words from the original speech.
Overview:
The main steps of the project are as follows:
Input of the parent speech signal and the targeted word signal.
Noise removal from both signals.
Elimination of redundant portions of the signals.
Downsampling of the signals.
Identification of the target sequence through correlation and related techniques.
Applications:
This technology can be valuable in several areas. In recent times, the use of vulgar words in speech has increased significantly, and young children are often exposed to them. This word-omitting technique can be applied to automatically filter out inappropriate language.
A database can be established and trained to identify and remove specific words from speech signals. Another potential application is the removal of copyrighted sequences from audio or video clips.
Furthermore, the pattern recognition technique used here can be extended to create distinct models for different words. As a result, a database of word models can serve multiple purposes in advanced speech processing and recognition systems.
Figure: Input signal containing targeted word
Figure: Output signal omitting targeted word
An elevator is an essential part of any modern building structure. This project presents a complete study of elevator control for a six-story building using digital logic circuits. A unique aspect of this work is that no microcontroller or Programmable Logic Controller (PLC) has been used for logic implementation. Instead, the design emphasizes developing logic equations through logical computation and using fundamental digital logic circuit components.
First, the possible events associated with the upward and downward movement of the elevator were identified. These events were then used as variables to form logic equations determining whether the elevator should move upward or downward. In this process, event priorities were carefully considered so that requests were served on a priority basis.
Once the direction of movement is determined, the elevator changes its level based on its current position. The input keys (used by passengers inside or outside the elevator) and the output display (showing the current position) were designed to resemble those found in a standard six-story elevator system.
The circuit design was simulated using Proteus 8 Professional software to verify functionality and then implemented on hardware using breadboards and standard ICs. The elevator operates between six floors — identified as the Ground Floor, 1st Floor, 2nd Floor, 3rd Floor, 4th Floor, and 5th Floor.
Each elevator unit contains six internal switches labeled GF, 1F, 2F, 3F, 4F, and 5F, corresponding to each floor. Additionally, there are ten external switches labeled GUP, 1UP, 1DOWN, 2UP, 2DOWN, 3UP, 3DOWN, 4UP, 4DOWN, and 5DOWN, forming the basis of the common control system — resulting in a total of sixteen switches in the complete setup.
The entire circuit was successfully implemented both on a breadboard and on a PCB, demonstrating the practical functionality of the designed lift control system.
PCB Implementation
Counter Block
External Clear Block
Complete Logic Circuit
Input Block
Direction Determining Block
Objective:
The objective of this project is to design, from concept to layout, a simplified version of a Microprocessor without Interlocked Pipeline Stages (MIPS) processor. The project also includes developing a testbench to verify its operation and creating the gate-level structure followed by the complete physical design process. The physical design flow covers floorplanning, power mesh design, clock tree synthesis, nanorouting, post-routing timing optimization, and design rule checking (DRC).
Project Details:
A 32-bit MIPS processor has been designed with the following specifications in mind.
The instruction set is 32-bit and supports R-format, load, store, branch, and unconditional jump operations. The MIPS module (processor module) was developed entirely using synthesizable Verilog code.
While a standard MIPS architecture includes 32 registers, this design simplifies the implementation by using only $t0–$t8 registers with 5-bit addressing — where 5'b00000 corresponds to $t0 and 5'b01000 corresponds to $t8. With 32-bit addressing, the data memory size is 4 GB, although for demonstration purposes, only the first 32 words were initialized to zero.
The machine code was manually written in the instruction register. The implemented R-format instructions include the ALU operations ADD, SUB, AND, OR, NOR, and SLT. The corresponding opcode, function, alu_op, and alu_control bits were implemented according to their respective operational specifications.
ALU Control
Main Control Unit
Program Counter
Program Counter Update
MIPS Processor
Hole transport material (HTM) plays a vital role in the efficiency and stability of perovskite solar cells (PSCs). Spiro-MeOTAD, the most commonly used HTM, is very costly and can be easily degraded by moisture, thus offering a hindrance to commercializing PSCs. There is a dire need to find an alternate stable HTM to exploit PSCs with their maximum capability. In this thesis work, a comprehensive device simulation is used to study different possible parameters that can influence the performance of PSCs with a p-i-n structure (Glass/ TCO/TiO2/Perovskite/ CuI). CuI is used as HTM, it is a p-type inorganic material with low cost and relatively high stability. It is found that cell performance improves greatly with decreasing defect density and increasing absorber layer thickness but there is a practical limit. Upon optimization of parameters, power conversion efficiency (PCE) for this device is found to be 24.42 %. The result shows that lead-based PSC with CuI as HTM is a stable and efficient system. We also propose a heterojunction and linear bandgap grading of two perovskites for further increase of efficiency. Enhancing the stability and reduction of defect density are critical factors for future experimental research. These factors can be largely improved by a better fabrication process.
Figure : SCAPS Generated Energy-Band Diagram.
Figure: J-V characteristics comparison between graded and non-graded Perovskite.
Figure: Quantum efficiency comparison between graded and non-graded Perovskite.
The power output of a wind turbine generator is smoothed by using a parallel generator, which contributes only when the turbine’s power supply does not meet the demand. The key idea is that the parallel generator operates using energy previously stored by the wind turbine in a DC storage system. A bypass module is employed to either route power directly from the turbine or supply it from the DC storage system as needed.
We used MATLAB Simulink to simulate the proposed system, developing separate models for each subsystem. The Wind Turbine Induction Generator model was used to represent the wind turbine, while a synchronous machine was implemented to convert DC to AC power.
To introduce realistic variability, a normally distributed random number generator was used to generate wind velocities, since the turbine’s power output is proportional to the cube of the wind velocity. The real power output from the turbine was fed through a user-defined function block and then to the input of the synchronous machine.
This user-defined function block — acting as the bypass and switching module — monitors the power flow and determines whether the turbine’s power should be sent directly to the load, the DC storage should supply the power, or the DC storage should be charged.
Figure 1: Block Diagram
Schematic Diagram
This meter calculates the consumed electrical energy (kWh) and the corresponding bill amount. The meter can be recharged using a PIN code available on scratch cards. A Hall effect sensor and the input pins of an Arduino Uno are used to measure current and voltage, respectively. The continuous input parameters are processed by an embedded program that updates the balance status at a refresh rate of 33 seconds.
For home appliances, affordability and usefulness are major concerns. This motivation led us to develop a low-cost vacuum cleaner that meets the rising demand for domestic cleaning applications.
For effective operation, a universal motor was selected due to its high starting torque and efficiency. Since a universal motor can operate on both AC and DC power while maintaining the same torque direction, it offers flexibility depending on the available supply. When powered by DC, the motor achieves higher speed, greater starting torque, and improved efficiency, making it well-suited for our design requirements.
The mechanical setup of the device was carefully designed to effectively remove dust from open surfaces, ensuring strong suction performance. Through the development process, we encountered several practical challenges, which helped us understand how the machine’s performance could be further enhanced. Based on these observations, we proposed several recommendations for future improvements to address various operational complexities.
Overall, this vacuum cleaner prototype demonstrates that a cost-effective and efficient cleaning device can be developed using simple components. We aim to continue improving the design for better performance in future iterations.