Scalable Three-dimensional Electronics Laboratory

[STEL]

Schematic of ALD process

Schematic of ALE process

Atomic Layer Deposition Process
& Novel Materials

ALD precursor design for phase-pure thin film deposition
(Collaboration with KRICT)
Metal ALD for BEOL application
Low-temperature ALD process for Monolithic-3D integration
Thin film materials ▼

Semiconducting layer
- n-type : SnO₂, ZnO, In₂O₃, InGaO, ZnSnO, InGaSnO, InSnZnO, SnS₂, MoS₂, ReS₂, ITO, InSe, In₂Se₃
- p-type : SnO, Cu₂O, SnS, SnSe, Te, TeSeOx

Metal layer
- Pt, Ru, MoN, TaN, TiN, NbN

Dielectric layer
- Alumina, Zirconia, Hafnia, Yttria, Silicon oxide, Silicon nitride

Plasma-Enhanced Atomic Layer Etching Process

Selective-ALE for future interconnect materials (Co, Mo, Ru)
Highly anisotropic profile formation
Etching mechanism analysis via OES & RGA

Study on Interface/Surface Chemistry for Developing Sub-10 nm Scaled Devices

Atmospheric plasma ion deposition process for hydrophobic/hydrophilic surface structure control
Dielectric/Metal interface quantification technique (DRAM cap target)
Unideal interfacial layer reduction technqiue
Selective deposition & etching process

Capacitor structure in Hynix 1Gb DRAM

Transfer curve of IZTO TFT

CMOS thin films inverter fabricated
at low temperature (<240℃)

Vertical transistor

n-type & p-type Thin Film Transistors and CMOS Inverters for M3D applications/Display Applications

Oxide transistors for 4F2 DRAM, next-generation V-NAND Flash & Display backplane
CMOS Thin film inverters fabricated by Low-temperature ALD processes
Research on exploring next-generation channel layers such as chalcogenide thin films, metal chalcogenide thin films and organic-inorganic hybrid materials

Novel Deposition/Patterning Techniques for 2-D Materials

Crystal orientation-controlled growth of 2-D materials
Surface functional group engineering(SAM, Plasma, UVO, Flourocarbon) for atomic selective deposition technique
Atomic layer etching(ALE)
Cation-regulated transformation for the synthesis of well-oriented 2-D materials

Cation-regulated trasnformation process for SnS thin films

We are actively looking for highly motivated Graduate Students (M.S./Ph.D.) and Undergraduate Interns with various backgrounds (chemical engineering, materials science, physics, chemistry, electrical engineering etc.).

Please contact Prof. In Hwan Baek (baek@inha.ac.kr) if you are interested in our research areas.

반도체 공정(증착과 식각) 및 전자 소자 연구에 관심있는 학생분들은 인하대 백인환 교수에게 연락주세요.

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