PLATFORM: ARDUINO
LANGUAGE: C++
This project provides an automated light controlling system. This system is operated automatically, without any manual operation. This project is mainly based on the fundamental electronics devices, transistors, diodes, relay, LDR etc. and handy for a low price power efficient system.
LANGUAGE: MATLAB
LANGUAGE: MATLAB
PLATFORM: ARDUINO
Project Demonstration was uploaded to the Teacher's website. Please scroll down to the Student Projects to see my explanation of this fun project.
JOINT PROJECT WITH MECHANICAL ENGINEERING DEPT. UNDER THE SUPERVISION OF DR. MOHAMMAD HARUN‑OR‑RASHID
SUPERVISION: NAHYAN AL MAHMUD (ASSISTANT PROFESSOR)
This project was done in two stages; the first one is building a voltage stabilizer, and the second one is improving the power factor.
Working Principle:
DESIGNED IN PROTEUS DESIGN SUITE
This 8‑bit microcomputer has 64 kBytes of main memory (RAM) support, provision for hexadecimal input and output.
PLATFORM: CADENCE VIRTUOSO AND HSPICE.
SUPERVISION: SAFAYAT‑AL‑IMAM(ASSISTANT PROFESSOR)
• The same ALU was designed varying transistor count and different layouts were drawn to get the most faithful reproduction of outputs with
minimum transistors.
• Analyzed performances of the ALU using SPICE‑Compatible Model of conventional CMOS, CNTFET, and GNRFET.
Under The Supervision Of
SAFAYAT-AL-IMAM
Assistant Professor
Ahsanullah University of Science and Technology
Department Of Electrical and Electronic Engineering
Abstract
In this thesis project, an alternate device known as Graphene Nano Ribbon (GNR) is used, which stands out as replacements of MOSFETs. Numerous design structures such as Inverter, Adder, 4:1 MUX, Arithmetic Logic Unit (ALU) (using both 10nm & 32nm design rule for single-bit and multi-bit) have been used for the performance analysis. ALU has been designed with the emerging Graphene Nano Ribbon-based FET (GNRFET) at 32nm technology node. The results have been optimized by varying the number of graphene nanoribbons (GNRs). Lastly, the results are compared with a CMOS based ALU to get a realistic idea of its performance compared to the state of the art technology.
Delay, Power & Power-Delay Product (PDP), and energy-delay product (EDP) has been chosen as parameters of comparison between the aforementioned devices. The MOSFET type GNRFET model has been used for simulation purposes on the HSPICE platform.
Designed all the circuits and drawn the layouts in Cadence Virtuoso. (Library name: tvir)
Written SPICE NETLIST for several logic gates and sub-circuits.
Written all the MATLAB codes for Graphical analysis.
Contribution towards writing a Conference Paper Based on this thesis.