EEE 3104

Topic

Full Adder, Full Subtractor

4-bit Binary Adder/Subtractor

BCD Adder

Basic Latches and Flip-flops

Basic counters (Ring Counter, Down Counter with 7-segment display)

Introduction to FPGA

How to simulate multi-bit logic circuits in Quartus II

Proteus Tutorials

(Courtesy: Sajid Muhaimin Chowdhury, Assistant Professor, EEE, BUET)

https://engineering.purdue.edu/~sajidmc/index

All Proteus Simulation Files

Using Internal Clock of Altera FPGA board

Installing USB-Blaster driver software on Windows 8 (or Windows 10) (Not required if you do not have an Altera FPGA board in your possession):

Courtesy: http://altera-guide.blogspot.com/

External Resources on Altera FPGA

Google drive Folder

Using Internal Clock of FPGA Board

Tutorial on USB-Blaster Driver Installation

http://www.ece.tufts.edu/~hchang/ee129-f06/

http://www.johnloomis.org/digitallab/

https://web.eecs.umich.edu/~pmchen/engr100/

http://u.osu.edu/ece2060labs/labs/

http://www.eecg.utoronto.ca/~jayar/ece241_07F/

Project Demonstration

(Uploaded by student)