Publications
Explore the research outcomes of TAIS Lab.
A collection of journal papers, conference presentations, and patents from our ongoing work.
Explore the research outcomes of TAIS Lab.
A collection of journal papers, conference presentations, and patents from our ongoing work.
Journal († equal contribution, * corresponding author)
51. C. Han†, Y. Cho†, D. Kim†, S.-H. Hwang†, M. Song, B. Kwak, D. Radermacher, M. W. Kang, S. Kim, J. Kim*, W. Shin*, D. Kwon*, "A ferroelectric-ionic-trapping transistor for ultra-low power and secure neuromorphic computing," Nature Communications, Accepted.
50. J.-H. Kim†, W. Shin†*, R.-H. Koo†, J. Kim†, E. Park†, P. Behera, S. Kim, J. Hong, F. Al-Dirini, B. Kwak, J. You, J. Im, D. Koh, Y. Hong, Q. Xue, H.-M. Kim, H. Seok, Y. Cho, H. Ju, W. Jung, K. Lee, D. Ha, J.-H. Lee, S.-Y. Lee, D.-H. Kwon, F. M. Ross, Y. Kang, S. S. Cheema*, D. Kwon*, "Hybrid ferroelectric-ionic memristive hardware for high scalability in-memory computing," Nature Communications, Accepted.
49. R.-H. Koo†, J. Ko†, W. Shin†, S. Ryu, J. Im, S.-H. Park, J. Hwang, M. Song, Y. Cho, J. Kim, G. Jung, D. Kwon, J.-H. Lee*, "CMOS-compatible ferroelectric tunnel junctions integrate stochastic sampling and deterministic computing for image generation," Nature Communications, Accepted.
48. J. Ko†, J. Im†, S.-H. Park†, J. Gu, J. Cho, J. Hwang, R.-H. Koo, J. Kim, S. Y. Woo, J.-H. Lee*, "Analysis of vertical AND flash memory for energy-efficient, scalable, fast CIM beyond vertical NAND flash memory," Nano Convergence, 13(1), 16 (2026).
47. J. You†, J.-H. Kim†, M. Song†, B. Kwak, E. C. Park, M.-C. Nguyenc, W. Shin*, J. Kim*, D. Kwon*, "Tunable Switching Mechanisms in HfZrO2-Based Tunnel Junctions for High-Performance Synaptic Arrays," Advanced Science, 13(18), e16478 (2026).
46. C. Han†, R.-H. Koo†, M. Song†, Y. Cho, M. W. Kang, J. Kim, J.-H. Lee, W. Shin*, D. Kwon*, "A Monolithic Ferroelectric-Ionic Duality for Stochastic-Neuromorphic Core Integration," Advanced Materials, Accepted.
45. R.-H. Koo†, C. Han†, J. Yim, J. Im, Y. Cho, J.-H. Lee, S. S. Cheema, J. Kim*, W. Shin*, D. Kwon*, "Physical Reservoir Computing System via Hybrid Ferroelectric-Ionic Transistors," Advanced Materials, 38(2), e11337 (2026).
44. B. Kwak†, R.-H. Koo†, Y. Cho†, C. Han, D. Kim, S. Jeong, Y. Shin, J. Choi, J. Im, J. Ko, J.-H. Lee, J. Kim, Y. Kang*, W. Shin*, D. Kwon*, "In Materia Shaping of Randomness with a Standard Complementary Metal-Oxide-Semiconductor Transistor for Task-Adaptive Entropy Generation," Advanced Functional Materials, 36(23), e22351 (2026).
43. J. Im, J. Ko, J. Im, J. Hwang, R.-H. Koo, S.-H. Park, J. Kim, W. Shin, S. Y. Woo*, J.-H. Lee*, "Harnessing Chaotic Bifurcation in Positive Feedback Transistors for Secure and Scalable Random Key Generation," Nature Communications, 16, 11313 (2025).
42. D. K. Lee, S. Go, J. Y. Park, H. Noh, J. Choi, J. Kim, S. Kim, S. Kim*, "Analysis of Transient Response of Negative Capacitance Field-Effect Transistor," IEEE Access, 13, 216548-216558 (2025).
41. J. Im†, J. Kim†, J. Ko, W. Shin, R.-H. Koo, J. Kim, J.-H. Lee*, "Hybrid Functional 3D Artificial Synapses for Convolution and Reinforcement Learning," Science Advances, 11(46), eadw7498 (2025).
40. S. Jeong†, C.-H. Han†, B. Kwak†, R.-H. Koo, Y. Cho, J. Kim, J.-H. Lee, D. Kwon*, W. Shin*, "Unraveling ionic switching dynamics in high-k dielectric double-gate transistors via low-frequency noise spectroscopy," Nano Convergence, 12(1), 1-13 (2025).
39. H. Ahn, D. K. Lee, S. Go, J. Kim, S. Kim, S. Kim*, "Novel Hybrid SRAM for Low-Power Application," IEEE Electron Device Letters, 46(11), 1938-1941 (2025).
38. C. Lee†, Y. Jeong†, R.-H. Koo†, Y. Cho†, K. Choi, G. Jung, J. Kim, S. Hong, J. Im, S.-T. Lee, J. Kim, D. Radermacher, W. Shin*, J.-H. Lee*, "Low-frequency noise in CMOS-integrated gas sensors: from a reliability constraint to a selective sensing feature," Sensors and Actuators B: Chemical, 446, 138701 (2025).
37. R.-H. Koo†, S. Kim†, J. Im, S. Ryu, K. Choi, S.-H. Park, J. Ko, J. Ji, M. Oh, J. Kim, G. Jung, S.-T. Lee, D. Kwon*, W. Shin*, J.-H. Lee*, "Physical correlation between stochasticity and process-induced damage in ferroelectric memory devices," Nano Convergence, 12(1), 1-15 (2025).
36. M. Song†, R.-H. Koo†, J. Kim†*, C.-H. Han, J. Yim, J. Ko, S. Yoo, D.-H. Choe, S. Kim, W. Shin, D. Kwon*, "Ferroelectric NAND for Efficient Hardware Bayesian Neural Networks," Nature Communications, 16(1), 6879 (2025).
35. R.-H. Koo†, W. Shin†*, J. Im†, S. Kim, S. Ryu, G. Jung, J. Kim, S.-H. Park, K. Choi, J. Ko, S.-T. Lee, D. Kwon*, J.-H. Lee*, "Interface percolation and random trap generation in ferroelectric memory: A two-step degradation mechanism explored through low-frequency noise spectroscopy," Chaos, Solitons & Fractals, 199, 116760 (2025).
34. R.-H. Koo†, W. Shin†*, J. Im, S. Ryu, S. Kim, J. Kim, K. Choi, S.-H. Park, J. Ko, J. Ji, M. Oh, G. Jung, S.-T. Lee, D. Kwon*, J.-H. Lee*, "A universal re-annealing method for enhancing endurance in hafnia ferroelectric memories: Insights from stochastic noise analysis," Chaos, Solitons & Fractals, 199, 116748 (2025).
33. J. Ko†, J. Im†, J. Kim, W. Shin, R.-H. Koo, S.-H. Park, S. Y. Woo*, J.-H. Lee*, "CMOS-compatible flash-gated thyristor–based neuromorphic module with small area and low energy consumption for in-memory computing," Science Advances, 11(29), eadt8227 (2025).
32. C. Han†, R.-H. Koo†, W. Shin†*, J. Kim, B. Kwak, J. Im, S. Kim, S.-Y. Lee, Y. Kang*, D. Kwon*, "Ultrathin TiO2-interfaced Hafnia Ferroelectric Transistor for Large-Scale Neuromorphic Computing," Nano Energy, 142, 111226 (2025).
31. E. C. Park†, J. Kim†*, J. Ko†, W. Shin†, M.-C. Nguyen, M. Song, K.-R. Kwon, R.-H. Koo, D. Kwon*, "Hafnia-based Ferroelectric Computer Vision System with Artificial Synaptic Array," Nano Energy, 139, 110877 (2025).
30. R.-H. Koo†, W. Shin†*, S. Kim†, J. Kim†, B. Kwak, J. Im, H. Kim, D.-H. Kwon, S. S. Cheema, J.-H. Lee, D. Kwon*, "Low-Frequency Noise Spectroscopy for Navigating Geometrically Varying Strain Effects in HfO2 Ferroelectric FETs," Advanced Science, 12(23), 2501367 (2025).
29. W. Shin†, C.-H. Han†, J. Kim†, R.-H. Koo, K. K. Min*, D. Kwon*, "Effects of Charge Imbalance on Field-induced Instability of HfO2-based Ferroelectric Tunnel Junctions," Advanced Electronic Materials, 11(2), 2400299 (2025).
28. W. Shin†, S. Lee†, R.-H. Koo†, J. Kim†, S. Y. Lee*, S.-T. Lee*, "Does a large response suffice?: Thermally stable and low noise Si-doped IZO thin-film transistor-type gas sensors," Sensors and Actuators B: Chemical, 422, 136498 (2025).
27. J. Im†, J. Ko†, J. Hwang, J. Kim, W. Shin, R.-H. Koo, M. Park, S.-H. Park, W. Y. Choi, J.-J. Kim, J.-H. Lee*, "Multifunctional In-Memory Analog-to-Digital Converter for Next-Gen Compute-in-Memory Systems," Advanced Intelligent Systems, 7(5), 2400594 (2024).
26. W. Shin†, J. Y. Lee†, J. Kim†, S. Y. Lee*, S.-T. Lee*, "Low-Frequency Noise Analysis on Asymmetric Damage and Self-Recovery Behaviors of ZnSnO Thin-Film Transistors under Hot Carrier Stress," Discover Nano, 19(1), 187 (2024).
25. J. Kim†, J. Im†, J.-H. Lee*, "Performance Optimization in 3D Flash Memory Cell Stack via Process Variable Engineering," IEEE Electron Device Letters, 45(12), 2395-2398 (2024). [Editors’ Pick]
24. S. W. Kim†, W. Shin†*, R.-H. Koo†, J. Kim†, J. Im, D. Koh, J.-H. Lee, S. S. Cheema*, D. Kwon*, "A new back-end-of-line ferroelectric field-effect transistor platform via laser processing," Small, 21(15), 2406376 (2024). [Front Cover]
23. J. Kim†, E. C. Park†, W. Shin†, R.-H. Koo, C.-H. Han, H. Y. Kang, T. G. Yang, Y. Goh, K. Lee, D. Ha, S. S. Cheema*, J. K. Jeong*, D. Kwon*, "Analog Reservoir Computing via Ferroelectric Mixed Phase Boundary Transistors," Nature Communications, 15(1), 9147 (2024). [Editor’s Highlight & Featured Article]
22. R.-H. Koo†, W. Shin†, G. Jung, J. Kim, S.-T. Lee, J. Im, S.-H. Park, J. Ko, D. Kwon*, J.-H. Lee*, "Strain–Stress Impact on Ferroelectric Devices: A Multilayer Analysis and Optimization Strategy for Neural Networks," ACS Materials Letters, 6(11), 5170-5178 (2024).
21. J. Kim†, E. C. Park†, W. Shin†, R.-H. Koo†, J. Im, C.-H. Han, J.-H. Lee, D. Kwon*, "All-Ferroelectric Spiking Neural Networks via Morphotropic Phase Boundary Neurons," Advanced Science, 11(44), 2407870 (2024).
20. R.-H. Koo†, W. Shin†, J. Kim†, J. Yim, J. Ko, G. Jung, J. Im, S.-H. Park, J.-J. Kim, S. S. Cheema, D. Kwon*, J.-H. Lee*, "Polarization Pruning: Reliability Enhancement of Hafnium-based Ferroelectric Devices for Memory and Neuromorphic Computing," Advanced Science, 11(43), 2407729 (2024).
19. J. Kim, J. Im, J.-H. Lee*, "Thermal Instability Compensation of Synaptic 3D Flash Memory-Based Hardware Neural Networks with Adaptive Read Bias," IEEE Electron Device Letters, 45(11), 2233-2236 (2024).
18. B. Kwak†, J. Kim†, K. Lee, W. Shin*, D. Kwon*, "Low-Frequency Noise Characteristics of Recessed Channel Ferroelectric Field-Effect Transistors," IEEE Electron Device Letters, 45(11), 2118-2121 (2024).
17. J. Im†, J. Kim†, J. Hwang, M. Park, R.-H. Koo, J. Ko, S.-H. Park, W. Y. Choi, J.-H. Lee*, "Vertical AND-type Flash TFT Array Capable of Accurate Vector-Matrix Multiplication Operations for Hardware Neural Networks," IEEE Electron Device Letters, 45(7), 1385-1388 (2024).
16. J. Kim, J. Im, S. Oh, W. Shin, G. Jung, S.-T. Lee, J.-H. Lee*, "Vertical AND-Type Flash Synaptic Cell Stack for High-Density and Reliable Binary Neural Networks," IEEE Electron Device Letters, 45(7), 1369-1372 (2024).
15. J. Kim, J. Im, W. Shin, S. Lee, S. Oh, D. Kwon, G. Jung, W. Y. Choi, J.-H. Lee*, "Demonstration of In-Memory Biosignal Analysis: Novel High-Density and Low-Power 3D Flash Memory Array for Arrhythmia Detection," Advanced Science, 11(26), 2308460 (2024).
14. J. Kim, W. Shin, J. Yim, D. Kwon, D. Kwon*, J.-H. Lee*, "Toward Optimized In-Memory Reinforcement Learning: Leveraging 1/f Noise of Synaptic Ferroelectric Field-Effect-Transistors for Efficient Exploration," Advanced Intelligent Systems, 6(6), 2300763 (2024).
13. W. Shin†, J. Y. Lee†, R.-H. Koo, J. Kim, J.-H. Lee, S. Y. Lee*, S.-T. Lee*, "Unveiled Influence of Sub‐gap Density of States on Low-Frequency Noise in Si-Doped ZnSnO TFTs: Does Correlated Mobility Fluctuation Model Suffice?," Advanced Electronic Materials, 10(2), 2300515 (2024).
12. J. Kim, Y.-T. Seo, W. Shin, W. Y. Choi, B.-G. Park, J.-H. Lee*, "Hardware-based Noisy Deep Q-Networks Using Low-Frequency Noise of Synaptic Devices for Efficient Exploration," IEEE Electron Device Letters, 44(9), 1571-1574 (2023).
11. J. Kim, S. Lee, C.-H. Kim, B.-G. Park, J.-H. Lee*, "Analog synaptic devices applied to spiking neural networks for reinforcement learning applications," Semiconductor Science and Technology, 37(7), 075002 (2022).
10. J. Im†, J. Kim†, H.-N. Yoo, J.-W. Baek, D. Kwon, S. Oh, J. Kim, J. Hwang, B.-G. Park, J.-H. Lee*, "On-chip Trainable Spiking Neural Networks Using Time-To-First-Spike Encoding," IEEE Access, 10, 31263-31272 (2022).
9. H. Kim†, J. Hwang†, D. Kwon, J. Kim, M.-K. Park, J. Im, B.-G. Park, J.-H. Lee*, "Direct Gradient Calculation: Simple and Variation-Tolerant On-Chip Training Method for Neural Networks," Advanced Intelligent Systems, 3(8), 2100064 (2021).
8. J. Kim, D. Kwon, S. Y. Woo, W.-M. Kang, S. Lee, S. Oh, C.-H. Kim, J.-H. Bae, B.-G. Park, J.-H. Lee*, "On-chip trainable hardware-based deep Q-networks approximating a backpropagation algorithm," Neural Computing and Applications, 33(15), 9391-9402 (2021).
7. W.-M. Kang†, D. Kwon†, S. Y. Woo, S. Lee, H. Yoo, J. Kim, B.-G. Park, J.-H. Lee*, "Hardware-based spiking neural network using a TFT-type AND flash memory array architecture based on direct feedback alignment," IEEE Access, 9, 73121-73132 (2021).
6. J. Kim, D. Kwon, S. Y. Woo, W.-M. Kang, S. Lee, S. Oh, C.-H. Kim, J.-H. Bae, B.-G. Park, J.-H. Lee*, "Hardware-based spiking neural network architecture using simplified backpropagation algorithm and homeostasis functionality," Neurocomputing, 428, 153-165 (2021).
5. D. Kwon, S. Lim, J.-H. Bae, S.-T. Lee, H. Kim, Y.-T. Seo, S. Oh, J. Kim, K. Yeom, B.-G. Park, J.-H. Lee*, "On-chip training spiking neural networks using approximated backpropagation with analog synaptic devices," Frontiers in Neuroscience, 14, 423, (2020).
4. S. Y. Woo, K.-B. Choi, J. Kim, W.-M. Kang, C.-H. Kim, Y.-T. Seo, J.-H. Bae, B.-G. Park, J.-H. Lee*, "Implementation of homeostasis functionality in neuron circuit using double-gate device for spiking neural network," Solid-State Electronics, 165, 107741 (2020).
3. J. Kim, C.-H. Kim, S. Y. Woo, W.-M. Kang, Y.-T. Seo, S. Lee, S. Oh, J.-H. Bae, B.-G. Park, J.-H. Lee*, "Initial synaptic weight distribution for fast learning speed and high recognition rate in STDP-based spiking neural network," Solid-State Electronics, 165, 107742 (2020).
2. S. Oh, C.-H. Kim, S. Lee, J. Kim, J.-H. Lee*, "Unsupervised online learning of temporal information in spiking neural network using thin-film transistor-type NOR flash memory devices," Nanotechnology, 30(43), 435206 (2019).
1. C.-H. Kim†, S. Lim†, S. Y. Woo, W.-M. Kang, Y.-T. Seo, S.-T. Lee, S. Lee, D. Kwon, S. Oh, Y. Noh, H. Kim, J. Kim, J.-H. Bae, J.-H. Lee*, "Emerging memory technologies for neuromorphic computing," Nanotechnology, 30(3), 032001 (2018).