Embedded Files
Research Goal: Cross-Stack Optimization for Efficient AI Systems
(Algorithm-Architecture-Logic/Circuit)
Shift from Separate HW/SW Optimization to Unified Chip-Architecture-Algorithm Co-design for AI.
SYMPLE Lab. Leads Next-generation AI Computing through Cross-stack Integrated Design.
Chip) AI Accelerator
SoC & Chip Design
Chip) AI Accelerator
SoC & Chip Design
Silicon-level design of next-generation
AI accelerators for efficient
on-device intelligence
Architecture) Memory-centric AI System Design
Architecture) Memory-centric AI System Design
Scalable and memory-centric architectures bridging models
and hardware platforms.
Algorithm) HW-aware Algorithm Optimization
Algorithm) HW-aware Algorithm Optimization
Cross-layer optimization of algorithms
and hardware to maximize
efficiency and performance.
On-going Funded Projects
Mar. 2026 ~ Dec. 2028
PIM Semiconductor Design Research Center
(PIM 반도체 설계연구센터)
과학기술정보통신부 PIM 인공지능 반도체 핵심기술개발
Mar. 2026 ~ Feb. 2031
NPU–SoC and LPDDR–PIM Architecture for On-Device AI Agents and Test-Time Scaling with Multi-Fidelity LLMs
(온디바이스 AI 에이전트와 테스트–타임 스케일링을 위한 멀티 피델리티 LLM 기반 NPU–SoC 및 LPDDR–PIM 아키텍처)
한국연구재단 세종과학펠로우십
Page updated
Google Sites
Report abuse