2025
J27. [JSSC 2025][Invited] Sangjin Kim, Jungjun Oh, Jeonggyu So, Yuseon Choi, Sangyeob Kim, Dongseok Im, Gwangtae Park, Hoi-Jun Yoo
“EdgeDiff: Energy-Efficient Multi-Modal Few-Step Diffusion Model Accelerator using Mixed-Precision and Reordered Group Quantization,”
in IEEE Journal of Solid-State Circuit
J26. [JETCAS 2025] Sangjin Kim, Yuseon Choi, Jungjun Oh, Byeongcheol Kim, Hoi-Jun Yoo
“LightRot: A Light-weighted Rotation Scheme and Architecture for Accurate Low-bit Large Language Model Inference,”
in IEEE Journal on Emerging and Selected Topics in Circuits and Systems
J25. [T. VLSI 2025] Jungjun Oh, Sangjin Kim, Jiwon Choi, Junha Ryu, Byeongcheol Kim, Yuseon Choi and Hoi-Jun Yoo
“An Energy-Efficient High Resolution Vision Transformer Processor Exploiting Token Similarity Beyond Token Merging,”
in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
J24. [JSSC 2025] Wenao Xie, Haoyang Sang, Beomseok Kwon, Dongseok Im, Sangjin Kim, Sangyeob Kim, Kangho Lee, Hoi-Jun Yoo
“ED-MPIM: An Energy-Efficient Event-Driven Smart Vision SoC With High-Linearity and Reconfigurable MRAM PIM,”
in IEEE Journal of Solid-State Circuits
J23. [JSSC 2025] Sangwoo Ha, Soyeon Um, Sangjin Kim, Kyomin Sohn, and Hoi-Jun Yoo
“Cache-PIM: An ECC-compatible eDRAM Processing-In-Memory for Last-Level Cache with Triple-level Error Correction,”
in IEEE Journal of Solid-State Circuits
J22. [JSSC 2025] Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Nayeong Lee, Jungwan Lee, Hoi-Jun Yoo
“C-Transformer: An Energy-Efficient Homogeneous DNN-Transformer/Spiking-Transformer Processor for Language Models,”
in IEEE Journal of Solid-State Circuits
J21. [JSSC 2025] Seongyon Hong , Wooyoung Jo, Sangjin Kim, Sangyeob Kim, Soyeon Um, Kyomin Sohn, and Hoi-Jun Yoo
“Dyamond: Compact and Efficient 1T1C DRAM IMC Accelerator With Bit Column Addition for Memory-Intensive AI,”
in IEEE Journal of Solid-State Circuits
2024
J20. [JSSC 2024] Sangjin Kim, Soyeon Um, Wooyoung Jo, Jingu Lee, Sangwoo Ha, Zhiyong Li, Hoi-Jun Yoo
“Scaling-CIM: eDRAM In-Memory-Computing Accelerator With Dynamic-Scaling ADC and Adaptive Analog Operation,”
in IEEE Journal of Solid-State Circuits
J19. [JSSC 2024] Soyeon Um, Sangjin Kim, Seongyon Hong, Sangyeob Kim, Hoi-Jun Yoo
“LOG-CIM: An Energy-Efficient Logarithmic Quantization Computing-In-Memory Processor With Exponential Parallel Data Mapping and Zero-Aware 6T Dual-WL Cell,”
in IEEE Journal of Solid-State Circuits
2023
J18. [JSSC 2023][Invited] Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo
“DynaPlasia: An eDRAM in-memory computing-based reconfigurable spatial accelerator with triple-mode cell,”
in IEEE Journal of Solid-State Circuits
J17. [TCAS-II 2023] Sangjin Kim, Hoi-Jun Yoo
“An Overview of Computing-in-Memory Circuits with DRAM and NVM,”
in IEEE Transactions on Circuits and Systems II: Express Briefs
J16. [JSSC 2023] Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi, Hoi-Jun Yoo
“C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture,”
in IEEE Journal of Solid-State Circuits
J15. [IEEE Micro 2023] Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Jiwon Choi, Donghyeon Han, Hoi-Jun Yoo
“COOL-NPU: Complementary Online Learning Neural Processing Unit,”
in IEEE Micro
J14. [IEEE Micro 2023] Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park, Hoi-Jun Yoo
“A Low-power AI-based 3D Rendering Processor with Hybrid DNN Computing,”
in IEEE Micro
J13. [JSSC 2023] Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park, Hoi-Jun Yoo
“MetaVRain: A Mobile Neural 3-D Rendering Processor With Bundle-Frame-Familiarity-Based NeRF Acceleration and Hybrid DNN Computing,”
in IEEE Journal of Solid-State Circuits
J12. [JSSC 2023] Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, Hoi-Jun Yoo
“Neuro-CIM: ADC-less neuromorphic computing-in-memory processor with operation gating/stopping and digital–analog networks,”
in IEEE Journal of Solid-State Circuits
J11. [JSSC 2023] Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Juhyoung Lee, Hoi-Jun Yoo
“SNPU: An energy-efficient spike domain deep-neural-network processor with two-step spike encoding and shift-and-accumulation unit,”
in IEEE Journal of Solid-State Circuits
J10. [TCAS-II 2023] Beomseok Kwon, Zhiyong Li, Sangjin Kim, Wooyoung Jo, Hoi-Jun Yoo
“A 92 fps and 2.56 mJ/frame Computing-in-Memory-based Human Pose Estimation Accelerator with Resource-Efficient Macro for Mobile Devices,”
in IEEE Transactions on Circuits and Systems II: Express Briefs
2022
J9. [TCAS-I 2022] Sangjin Kim, Sangyeob Kim, Juhyoung Lee, Hoi-Jun Yoo
“A low-power graph convolutional network processor with sparse grouping for 3d point cloud semantic segmentation in mobile devices,”
in IEEE Transactions on Circuits and Systems I: Regular Papers
J8. [JSSC 2022] Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, Hoi-Jun Yoo
“An efficient deep-learning-based super-resolution accelerating SoC with heterogeneous accelerating and hierarchical cache,”
in IEEE Journal of Solid-State Circuits
J7. [TCAS-II 2022] Sangwoo Ha, Sangjin Kim, Donghyeon Han, Soyeon Um, Hoi-Jun Yoo
“A 36.2 dB high SNR and PVT/leakage-robust eDRAM computing-in-memory macro with segmented BL and reference cell array,”
in IEEE Transactions on Circuits and Systems II: Express Briefs
J6. [JSSC 2022] Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Ji-Hoon Kim, Donghyeon Han, Hoi-Jun Yoo
“OmniDRL: An energy-efficient deep reinforcement learning processor with dual-mode weight compression and sparse weight transposer,”
in IEEE Journal of Solid-State Circuits
2021
J5. [JETCAS 2021] Sanghoon Kang, Gwangtae Park, Sangjin Kim, Soyeon Kim, Donghyeon Han, Hoi-Jun Yoo
“An overview of sparsity exploitation in CNNs for on-device intelligence with software-hardware cross-layer optimizations,”
in IEEE Journal on Emerging and Selected Topics in Circuits and Systems
J4. [JSSC 2021] Soyeon Kim, Sanghoon Kang, Donghyeon Han, Sangjin Kim, Sangyeob Kim, Hoi-Jun Yoo
“An energy-efficient GAN accelerator with on-chip training for domain-specific optimization,”
in IEEE Journal of Solid-State Circuits
J3. [IEEE Micro 2021] Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo
“ECIM: exponent computing in memory for an energy-efficient heterogeneous floating-point DNN training processor,”
in IEEE Micro
J2. [TCAS-II 2021] Soyeon Um, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo
“A 43.1 tops/w energy-efficient absolute-difference-accumulation operation computing-in-memory with computation reuse,”
in IEEE Transactions on Circuits and Systems II: Express Briefs
J1. [TCAS-II 2021] Soyeon Kim, Sangjin Kim, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo
“A 64.1 mW accurate real-time visual object tracking processor with spatial early stopping on siamese network,”
in IEEE Transactions on Circuits and Systems II: Express Briefs