PCB rendering done by Autodesk's circuits.io service.
NOTE: JP1, JP2 and JP3 are connected via a solder blob by default! (this is achieved with solder paste described in the Gerber files in PCB manufacturing, and is not depicted in the above render)
The ESPblaster is designed to be a high reliability, high performance serial programming board with dual inline package switches to adjust the differing startup conditions of the ESP8266-01 device.
The main intentions of the board is twofold:
The second reason is of extreme importance because the SPEEEduino v1.0 experiences very unpredictable (i.e. voodoo) problems with the ESP8266-01 module due to power supply stability issues (lack of decoupling and smoothing capacitors). This board design takes into account multiple sources of information, such as TI's LM1117 LDO regulator for the input and output capacitor values, and blog posts regarding decoupling capacitor values.
This board has a modified power delivery system for the ESP8266-01 module compared to the SPEEEduino v1.0. The original power delivery system has a single LDO regulator, with 1 10uF input capacitor and another 10uF output capacitor.
The new system uses 1 10uF input capacitor, a large 100/470uF output capacitor, and 2 decoupling capacitors near the ESP8266-01 module, 10uF and 0.1uF each for smoothing out higher frequencies of noise in the power lines.