Students

Journal

1. Yoonwoo Choi, Bogyeong Kim, Geonu An, Sunwoo An, Donghyeon Kim and Jaehyun Lee, "A breakthrough in contact engineering for sub-3 nm FinFETs: overcoming the fin-pitch bottleneck", Nanotechnology, 36, 50, 505201 (2025) DOI: 10.1088/1361-6528/ae2513

2. Jaesun Baek, Bogeun Jo, Hyeok Je Jeong, Bogyeong Kim, Juhui Kim, Yoonwoo Choi, Kwang Ryeol Kim, Chai Rok Lim, Yong Soo Kim, Dae Young Kim, Gi Yeol Yun, and Jaehyun Lee, "Access Transistor Analysis of a Proposed 3.5F2 DRAM With a Two-Stack Word Line Architecture for Next-Generation Scaling", IEEE Transactions on Electron Devices 72, 11, pp. 5966 (2025) DOI:10.1109/TED.2025.3607863

Conference

1. Donghyeon Kim, Yoonwoo Choi, Geonu An, and Jaehyun Lee, "CMOS-Compatible Backside Fabrication Scheme for 4F2 DRAM", Korean Conference on Semiconductors, Korea, 2026.

2. Yoonwoo Choi and Jaehyun Lee, "A TCAD Investigation of Optimized Contact Engineering for Sub-2nm Nanosheet FET", International Conference on Electronics, Information, and Communication (ICEIC), Macau, China, 2026.

3. Sunwoo An, Geonu An, Yoonwoo Choi, Bogyeong Kim, Jaehyun Lee, "Improving FinFET Scaling Limits Using Lightly Doped Drain Structures ", The 1st Korean Workshop on Computational Electronics, Korea, 2025.

4. Yoonwoo Choi, Bogyeong Kim, Geonu An, Sunwoo An, Jaehyun Lee, A Further Scaling Strategy for FinFETs Beyond 3nm: Elimination of Epitaxial Source/Drain ", The 1st Korean Workshop on Computational Electronics, Korea, 2025.

5. Juhui Kim, Bogyeong Kim, Geonu An, Sunwoo An, Yoonwoo Choi, Jaehyun Lee, Performance Improvement in 3nm FinFETs through Stategic Doping Optimization in S/D Extension Regions: A Simulation Study", Korean Conference on Semiconductors, Korea, 2025.

6. Yoonwoo Choi, Yunsong Oh, Chaeryoung Kang, Jaehyun Lee, "Investigating Contact Resistance in 3nm FinFETs and Beyond: The Diminishing Advantage of Epitaxial Source/Drain", Korean Conference on Semiconductors, Korea, 2025.

Journal

1. Yoonwoo Choi, Bogyeong Kim, Geonu An, Sunwoo An, Donghyeon Kim and Jaehyun Lee, "A breakthrough in contact engineering for sub-3 nm FinFETs: overcoming the fin-pitch bottleneck", Nanotechnology, 36, 50, 505201 (2025) DOI: 10.1088/1361-6528/ae2513

2. Jaesun Baek, Bogeun Jo, Hyeok Je Jeong, Bogyeong Kim, Juhui Kim, Yoonwoo Choi, Kwang Ryeol Kim, Chai Rok Lim, Yong Soo Kim, Dae Young Kim, Gi Yeol Yun, and Jaehyun Lee, "Access Transistor Analysis of a Proposed 3.5F2 DRAM With a Two-Stack Word Line Architecture for Next-Generation Scaling", IEEE Transactions on Electron Devices 72, 11, pp. 5966 (2025) DOI:10.1109/TED.2025.3607863

Conference

1.  Minju Kim, Woohyeong Kim, Jiseok Lee, Sehoon Jung, Bogyeong Kim, Jaehyun Lee, "LDD Optimization for Balancing Ioff and Ion in Scaled 4F² DRAM Structures", The 1st Korean Workshop on Computational Electronics, Korea, 2025.

2. Sunwoo An, Geonu An, Yoonwoo Choi, Bogyeong Kim, Jaehyun Lee, "Improving FinFET Scaling Limits Using Lightly Doped Drain Structures ", The 1st Korean Workshop on Computational Electronics, Korea, 2025 

3. Yoonwoo Choi, Bogyeong Kim, Geonu An, Sunwoo An, Jaehyun Lee, A Further Scaling Strategy for FinFETs Beyond 3nm: Elimination of Epitaxial Source/Drain ", The 1st Korean Workshop on Computational Electronics, Korea, 2025.

4. Juhui Kim, Bogyeong Kim, Geonu An, Sunwoo An, Yoonwoo Choi, Jaehyun Lee, Performance Improvement in 3nm FinFETs through Stategic Doping Optimization in S/D Extension Regions: A Simulation Study", Korean Conference on Semiconductors, Korea, 2025.

Journal

1. Yoonwoo Choi, Bogyeong Kim, Geonu An, Sunwoo An, Donghyeon Kim and Jaehyun Lee, "A breakthrough in contact engineering for sub-3 nm FinFETs: overcoming the fin-pitch bottleneck", Nanotechnology, 36, 50, 505201 (2025) DOI: 10.1088/1361-6528/ae2513

Conference

1. Sunwoo An and Jaehyun Lee, "Analysis of Dual-k Spacer Impact on Short-Channel Effects and Delay in 2-nm GAA Nanosheet FET", International Conference on Electronics, Information, and Communication (ICEIC), Macau, China, 2026.

2. Sunwoo An, Geonu An, Yoonwoo Choi, Bogyeong Kim, Jaehyun Lee, "Improving FinFET Scaling Limits Using Lightly Doped Drain Structures ", The 1st Korean Workshop on Computational Electronics, Korea, 2025.

3. Yoonwoo Choi, Bogyeong Kim, Geonu An, Sunwoo An, Jaehyun Lee, A Further Scaling Strategy for FinFETs Beyond 3nm: Elimination of Epitaxial Source/Drain ", The 1st Korean Workshop on Computational Electronics, Korea, 2025.

4. Juhui Kim, Bogyeong Kim, Geonu An, Sunwoo An, Yoonwoo Choi, Jaehyun Lee, Performance Improvement in 3nm FinFETs through Stategic Doping Optimization in S/D Extension Regions: A Simulation Study", Korean Conference on Semiconductors, Korea, 2025.

Conference

1. Jina Kim, Sumin Kang, Jeonghun Kim, Jaehyun Lee, "A Machine Learning Approach for Predicting Breakdown Voltage and ON-state Current in PiN Power Diode", Korean Conference on Semiconductors, Korea, 2025.

Journal

1. Yoonwoo Choi, Bogyeong Kim, Geonu An, Sunwoo An, Donghyeon Kim and Jaehyun Lee, "A breakthrough in contact engineering for sub-3 nm FinFETs: overcoming the fin-pitch bottleneck", Nanotechnology, 36, 50, 505201 (2025) DOI: 10.1088/1361-6528/ae2513

Conference

1. Donghyeon Kim, Yoonwoo Choi, Geonu An, and Jaehyun Lee, "CMOS-Compatible Backside Fabrication Scheme for 4F2 DRAM", Korean Conference on Semiconductors, Korea, 2026.

2. Geonu An and Jaehyun Lee, "Performance Enhancement and Process Feasibility of Nanosheet FETs with a Dual-Channel Structure", International Conference on Electronics, Information, and Communication (ICEIC), Macau, China, 2026.

3. Sunwoo An, Geonu An, Yoonwoo Choi, Bogyeong Kim, Jaehyun Lee, "Improving FinFET Scaling Limits Using Lightly Doped Drain Structures ", The 1st Korean Workshop on Computational Electronics, Korea, 2025.

4. Yoonwoo Choi, Bogyeong Kim, Geonu An, Sunwoo An, Jaehyun Lee, A Further Scaling Strategy for FinFETs Beyond 3nm: Elimination of Epitaxial Source/Drain ", The 1st Korean Workshop on Computational Electronics, Korea, 2025.

5. Juhui Kim, Bogyeong Kim, Geonu An, Sunwoo An, Yoonwoo Choi, Jaehyun Lee, Performance Improvement in 3nm FinFETs through Stategic Doping Optimization in S/D Extension Regions: A Simulation Study", Korean Conference on Semiconductors, Korea, 2025.

Conference

1. Minju Kim, Donghyeon Kim, Sehoon Jung, Hyeok Je Jeong, Chai Rok Lim, Gi Yeol Yun, and Jaehyun Lee, "Wrap-Around Contact Formation for High-Performance 4F2 DR AM", Korean Conference on Semiconductors, Korea, 2026.

2. Minju Kim, Woohyeong Kim, Jiseok Lee, Sehoon Jung, Bogyeong Kim, Jaehyun Lee, "LDD Optimization for Balancing Ioff and Ion in Scaled 4F² DRAM Structures", The 1st Korean Workshop on Computational Electronics, Korea, 2025.

3. Jitae Yoo, Minseock Kim, Minju Kim, Jaehyun Lee, "Quantitative Comparision of 4F2 DRAM Characteristics with Heavily Doped Silion Bit Line and Metal Line", Korean Conference on Semiconductors, Korea, 2025.

Conference

1. Minju Kim, Donghyeon Kim, Sehoon Jung, Hyeok Je Jeong, Chai Rok Lim, Gi Yeol Yun, and Jaehyun Lee, "Wrap-Around Contact Formation for High-Performance 4F2 DR AM", Korean Conference on Semiconductors, Korea, 2026.

2. Minju Kim, Woohyeong Kim, Jiseok Lee, Sehoon Jung, Bogyeong Kim, Jaehyun Lee, "LDD Optimization for Balancing Ioff and Ion in Scaled 4F² DRAM Structures", The 1st Korean Workshop on Computational Electronics, Korea, 2025.

Conference

1. Minju Kim, Woohyeong Kim, Jiseok Lee, Sehoon Jung, Bogyeong Kim, Jaehyun Lee, "LDD Optimization for Balancing Ioff and Ion in Scaled 4F² DRAM Structures", The 1st Korean Workshop on Computational Electronics, Korea, 2025.

Journal

1. Yoonwoo Choi, Bogyeong Kim, Geonu An, Sunwoo An, Donghyeon Kim and Jaehyun Lee, "A breakthrough in contact engineering for sub-3 nm FinFETs: overcoming the fin-pitch bottleneck", Nanotechnology, 36, 50, 505201 (2025) DOI: 10.1088/1361-6528/ae2513

Conference

1. Minju Kim, Donghyeon Kim, Sehoon Jung, Hyeok Je Jeong, Chai Rok Lim, Gi Yeol Yun, and Jaehyun Lee, "Wrap-Around Contact Formation for High-Performance 4F2 DR AM", Korean Conference on Semiconductors, Korea, 2026.

2. Donghyeon Kim, Yoonwoo Choi, Geonu An, and Jaehyun Lee, "CMOS-Compatible Backside Fabrication Scheme for 4F2 DRAM", Korean Conference on Semiconductors, Korea, 2026.