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I am actively looking for Full Time Oppurtunities, starting in May 2024 in fields of Digital Design, Computer Architecture, CPU Modelling, DSP based FPGA Implementations and VLSI Design and Verification.
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Recently worked on:
A Neural Network-Based Hybrid Branch Predictor
Course Project for Computer Architecture
This hybrid predictor is made up of the state of the art 64-byte TAGE predictor and the 2BC-gshare hybrid predictor which consists of a local and global predictor.
Our novel neural network based chooser is implemented to decide which prediction to take by training a set of data on branch history and prediction accuracy.
These training files are generated for each of the predictors by running traces through each of our branch predictors.
Supervisor: Prof. Daniel A. Jiménez, Computer Science and Engineering Department, Texas A&M University.
Seminar Topic for BTech Final Year
Working on a hybrid DWT-DCT based frequency domain watermarking embedding operation. Currently testing different strategies (some DCT based, some DWT based, some based on both on DCT-DWT) on Python(using OpenCV, Numpy, Scipy). Testing the robustness of my system from three tests:
Gaussian and Salt and Pepper Noise attack
JPEG Compression
Cropping and Scaling
Once an effective model is finalized, I will work to implement the design on an FPGA and optimize it.
Supervisor: Prof. Kishor Upla (Post-Doc), Electronics and Communications Engineering Department, SVNIT Surat.