Designed and verified an AES-128 Encryption & Decryption Core. Achieved fmax of 229.5 MHz after Static Timing Analysis (STA)
Designed and verified a Wishbone Compatible I2C Master (in Fast Mode - 400 kHz) to be interfaced with CAT24C208 EEPROM
Designed and verified an AES-128 Encryption & Decryption Core. Achieved fmax of 229.5 MHz after Static Timing Analysis (STA)
Designed a unique Approximate Integer Multiplier IP Block, a component for error resilient applications used in signal & image processing (used in Approximate Computing) and embedded data processing. Achieved adequate size reduction with acceptable error.
ResearchGate Link
Directly trained & mentored top 40 participants from 5 different states for Internet of Things (IoT) Workshop and 3D Modelling & Printing activities.
(About event: A mega endeavour co-created by Intel and Ministry of Electronics & Information Technology)
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(I am one on the extreme right, standing :) )
A unique undertaking to set up village based community-driven ecosystem to build maker-spirit for rural & tribal students. Travelled 50+ villages, directly mentored 300+ students in mechatronics. Nominated for Young Volunteer’s Award, 2019.