Publications

Strain-Engineered Wavelength Tuning in Flexible InGaN/GaN MQW LEDs via High-Modulus Tungsten Substrates

• Authors: Minjae Sung, Gopalakrishnan Dayal, Sanghyun Jeong, Donggyu An, Choong-Heui Chung, Kyojin Ku, Joon Sik Park, Jehee Park, Minjae Kang, Seongjun Kim, Dong Eun Kim, Young Jae Park, Hoon-Hwe Cho, Sangyeob Lee 

• Publication date: July 2026

• Abstract: Reversible wavelength tuning in flexible inorganic light-emitting diodes (LEDs) is essential for emerging applications in strain-tunable micro-LED displays, adaptive color rendering, and wearable optical communication yet remains constrained by the limited strain-transfer efficiency of conventional polymer substrates. Here, we report a substrate-modulus engineering strategy that overcomes this limitation by integrating InGaN/GaN multiple-quantum-well (MQW) LEDs onto high-modulus tungsten (W) foils through Au–Sn eutectic wafer bonding and KrF excimer laser lift-off. The high Young’s modulus of W (411 GPa) positions the neutral mechanical plane (NMP) 76.81 μm above the substrate base, delivering a tensile strain of ε ≈ 4.21 × 10–3 at the MQW active region under a maximum curvature of 64.89 m–1 (R ≈ 15.4 mm), approximately 3 times that achievable with polyethylene terephthalate (PET) substrates. This amplified strain drives blueshifts of 11.39 nm (blue, 473.76 → 462.37 nm) and 15.45 nm (green, 509.98 → 494.53 nm) at 20 mA, accompanied by ∼10% enhancement in electroluminescence intensity, through partial relaxation of the quantum-confined Stark effect (QCSE). The 36% larger blueshift for the green emitter directly reflects its higher indium mole fraction (∼24% vs ∼17%), which strengthens intrinsic piezoelectric polarization and amplifies strain sensitivity. These results, exceeding prior polymer-based approaches by more than an order of magnitude, demonstrate that neutral-plane engineering through deliberate substrate-modulus selection provides a deterministic, nonthermal route to large-magnitude spectral control in flexible III-nitride emitters.

Fabrication and defect-driven analysis of CMOS inverters using SnOx/ZnO TFTs: Implications for balanced performance

• Authors: Viswanath G. Akkili, Sanghyun Jeong, Frederick Aziadzo, Ashish A. Patil, Minjae Sung, Jung-Sub Wi, Joon Sik Park, Hoon-Hwe Cho, Choong-Heui Chung, Jong   Beom Ko, Dong-Eun Kim, Eui-Tae Kim, Jun-Hui Choi, R. Thangavel, Jae-Hyun Lee, Sangyeob Lee 

• Publication date: July 2025

• Abstract: The advance of System-on-Panel technology has enabled the integration of CMOS inverters to drive high-performance OLED and micro LED displays. Conventional two n–type TFT configurations in display drivers suffer from a voltage drop (VDD–VTh), resulting in diminished output intensity. To address this limitation, integrating a CMOS inverter comprising both p–type and n–type TFTs offers a promising solution. However, these CMOS inverters face issues, such as asymmetric switching, reduced gain, and diminished noise margin, primarily attributed to the poor electrical performance of the p–type TFTs. While previous studies on CMOS inverters have mainly addressed p–type TFT performance enhancement using various fabrication strategies, the route to improve performance by tuning the material defect density of states has remained unexplored. This work shows the performance disparity between the fabricated p–type SnO TFT and n–type ZnO TFTs, and integrates these TFTs into a CMOS inverter. Electrical characterization reveals good symmetry in threshold voltage (VTh) between SnOx and ZnO TFTs, which is essential for CMOS operation....

Amorphous Carbon Monolayer: A van der Waals Interface for High-Performance Metal Oxide Semiconductor Devices 

• Authors: Viswanath G Akkili, Jongchan Yoon, Kihyun Shin, Sanghyun Jeong, Ji-Yun Moon, Jun-Hui Choi, Seung-Il Kim, Ashish A Patil, Frederick Aziadzo, Jeongbeen Kim, Suhyeon Kim, Dong-Wook Shin, Jung-Sub Wi, Hoon-Hwe Cho, Joon Sik Park, Eui-Tae Kim, Dong-Eun Kim, Jaeyeong Heo, Graeme Henkelman, Kostya S Novoselov, Choong-Heui Chung, Jae-Hyun Lee, Zonghoon Lee, Sangyeob Lee 

• Publication date: December 2024

• Abstract: Ultrasmall-scale semiconductor devices (≤5 nm) are advancing technologies, such as artificial intelligence and the Internet of Things. However, the further scaling of these devices poses critical challenges, such as interface properties and oxide quality, particularly at the high-k/semiconductor interface in metal-oxide-semiconductor (MOS) devices. Existing interlayer (IL) methods, typically exceeding 1 nm thickness, are unsuitable for ultrasmall-scale devices. Here, we propose a one-atom-thick amorphous carbon monolayer (ACM) as the IL to address these issues for MOS devices. ACM is disordered, randomly arranged, and short of long-range periodicity with sp2 hybridized carbon network, offering impermeability, van der Waals (vdW) bonding, insulating behavior, and effective seeding layer. With these advantages, we have utilized ACM vdW IL (vIL) in Al2O3/H–Ge MOS capacitors. The interface trap density was …