Assistant Professor
Coordinator, Centre for Design and Fabrication of Electronic Devices
School of Computing and Electrical Engineering
Indian Institute of Technology (IIT) Mandi
Kamand, Himachal Pradesh, 175075, India
(Alexander von Humboldt Fellow, Senior Member IEEE)
News and Updates
Elsevier: Alexandria Engineering Journal
A bimetallic composite of cobalt (Co) and nickel (Ni) integrated into a zirconium-based metal-organic framework (ZrMOF) was successfully synthesized via a hydrothermal method for dual-functional applications. The Ni-Co/ZrMOF composite demonstrated good photocatalytic activity in degrading organic pollutants, particularly the antibiotic tetracycline (TC), outperforming Ni/ZrMOF, Co/ZrMOF, and pristine ZrMOF. This enhanced performance was attributed to the synergistic effect of the bimetallic system, which significantly increased the production of reactive oxygen species. Additionally, the integration of Ni-Co/ZrMOFs enabled the fabrication of a white light-emitting diode (WLED) by incorporating green formamidinium lead-bromide perovskite quantum dots (FAPQDs) and red-emitting phosphors powder onto a blue LED chip. The inclusion of FAPQDs into the Ni-Co/ZrMOF framework not only modified its structural properties but also enhanced its chemical stability through a straightforward solution-processing method. The resulting WLED exhibited superior performance, achieving a National Television System Committee (NTSC) color gamut coverage of 126.6 %. Notably, the NTSC coverage achieved in this work surpasses previously reported values, highlighting the excellent performance of the Ni-Co/ZrMOF@FAPQDs composite. This composite exhibits precise color coordinates and significant potential for next-generation WLED applications, further underscoring its versatility in environmental remediation and advanced optoelectronic devices. For details view doi: 10.1016/j.aej.2025.09.006
Elsevier: Materials Science and Engineering B
Fork-Sheet Field Effect Transistor (FS-FET) is expected to solve the PN margin concern of the emerging nanosheet FET structure for scaling beyond the sub-2 nm complementary-metal–oxide–semiconductor (CMOS) technology node. Here, the performance of Si Fork sheet FET is investigated with variation in gate oxide materials (SiO2, HfO2, and bilayer (HfO2/SiO2)) and doping variation in source, channel, and drain regions using the Sentaurus Technology Computer-Aided Design (TCAD) tool. The transfer characteristics assess critical device parameters such as sub-threshold swing (S), threshold voltage (Vth), and ION/IOFF current ratio. The proposed TiN/HfO2/SiO2/Si gate stack-based FS-FET revealed high ION, low IOFF, high ION/IOFF ratio of ∼ 10−5 A, ∼10−10 A, ∼105 for p-FS-FET and ∼ 1E−4 A, ∼1E−10 A, ∼ 1E6 for n-FS-FET, respectively, suitable for next-generation CMOS technology. For details view doi: 10.1016/j.mseb.2025.118655
Elsevier: Materials Science in Semiconductor Processing
Perovskite quantum dots (PQDs) have emerged as promising candidates for optoelectronic applications due to their tunable optical properties and high photoluminescence quantum yields. However, their performance is often limited by intrinsic surface defects such as halide vacancies and under-coordinated lead or halide ions which serve as non-radiative recombination canters, hindering efficient charge carrier dynamics. In this study, we systematically explore the effect of surface defect passivation using didodecyldimethylammonium bromide (DDAB) on the excited-state electron transfer behavior of CsPb(Br0.8I0.2)3 QDs. Through ligand-assisted surface modification, we demonstrate a substantial enhancement in photoinduced electron transfer (PET) efficiency toward redox-active molecules, namely anthraquinone (AQ) and benzoquinone (BQ). Comparative spectroscopic analyses encompassing steady-state and time-resolved photoluminescence (TRPL) reveal significantly prolonged exciton lifetimes and a pronounced suppression of non-radiative recombination pathways following DDAB treatment. Furthermore, photoluminescence quenching studies offer direct evidence of improved interfacial charge transfer kinetics, supported by increased apparent association constants (Kapp) derived from Benesi–Hildebrand analysis. Collectively, these findings underscore the pivotal role of surface chemistry in governing charge transfer dynamics and offer a strategic approach for engineering high-performance perovskite QDs for next-generation optoelectronic and energy conversion technologies. For details view doi: 10.1016/j.mssp.2025.109901
Wiley: PSS A
Future energy harvesting systems need a sustainable perovskite solar cell having low cost and good power conversion efficiency (PCE). Herein, the perovskite CsXY3 (X = Ge, Sn; Y = Cl, Br, I) absorber layer, nickel oxide (NiO) hole-transport layer, and zinc oxysulfide (ZnO0.25S0.75) electron-transport layer-based solar cell devices are investigated using SCAPS-1D numerical simulations. The CsXY3 solar cell devices performance is assessed by estimating the effects of ample parameters, such as thickness, doping concentration, bulk defects, thickness, and defects at NiO/CsXY3 and CsXY3/Zn(O0.25S0.75) interfaces. The Au/NiO/γ-CsSnI3/Zn(O0.25S0.75)/FTO device structure shows a low open-circuit voltage (VOC) ≈1.0580 V, high fill factor ≈88.14%, excellent PCE ≈31.40%, and reasonable short-circuit current density (JSC) ≈33.68 mA.cm−2. Further, the impact of series/shunt resistances and temperature discloses upright reliability of the Au/NiO/γ-CsSnI3/Zn(O0.25S0.75)/FTO device structure suitable for cost-effective solar cell device applications. For details view doi: 10.1002/pssa.202500209
Elsevier: Microelectronics Reliability
The device reliability on account of charge traps at the Al2O3/Ge interface is a main distress for the Ge-based Tunnel Field Effect Transistor (TFET). Here, the influence of Interface Trap Charges (ITC) on the charge plasma-based Ge-Double-Gate TFET (CP-Ge-DGTFET) and conventional Ge-DGTFET's DC, Analog/RF, and linearity characteristics have been inspected using technology-computer-aided-design (TCAD) simulations for the donor (positive) and acceptor (negative) ITC. The charge plasma concept is adopted to induce excess carrier concentration within the source region on the integration of optimum work function metal electrodes. To recognize the impact of ITC, several figures of merits have been investigated, such as transfer characteristics, electric field, transconductance, cut-off frequency, parasitic capacitance, and linearity performance parameters (VIP2, VIP3, IIP3, and IMD3). The CP-Ge-DGTFET device structure revealed superior performance and reliability in comparison to Ge-DGTFET, even under the influence of ITC at the Al2O3/Ge interface. Therefore, the CP-Ge-DGTFET device structure is a sturdy contender for Analog/RF and low-power switching applications. For details view doi:10.1016/j.microrel.2023.115312
Elsevier: Material Science and Engineering B
Here, Ge-Vertical Tunnel FET (VTFET)'s DC, Analog, and Linearity performance is investigated with variation in transistor regions doping, doping gradient step size, interface trap charges (ITC), and temperature. The CMOS Compatible and fabrication feasible Ge-VTFET with drain doping gradient revealed good performance and reliability even under ITC and temperature deviations, suitable for low-power switching & analog applications. For details view doi:10.1016/j.mseb.2023.116996
Elsevier: Results in Optics
Here, we present the design of a FASnI3 active layer-based PSC with Nickel oxide (NiO) as Hole Transport Layer (HTL) & Zinc Oxy-Sulphide (ZnO0.25S0.75) as the Electron Transport Layer (ETL). The proposed Au/NiO/FASnI3/ZnO0.25S0.75/FTO, device structure is investigated using SCAPS-1D solar cell capacitance simulator. The performance parameters of proposed solar cells device structure are investigated with variations in active layer (FASnI3) thickness, defect density & doping concentration; and variations of NiO HTL & ZnO0.25S0.75 ETL thickness, electron affinity & doping concentration to obtain higher performance. Moreover, the influence of series & shunt resistance, and temperature on the performance parameters of proposed solar cell device structure is inspected for lead-free and eco-friendly solar cell device applications. For details view doi: https://doi.org/10.1016/j.rio.2023.100444
IEEE: Transactions on Electron Devices
There are indelible challenges related to transistor action and realization of emerging two-dimensional van der Waals (vdW) multilayer (2D ml) field-effect transistors (FETs), to the post silicon technology era. For scalability, a cost-effective large area ultrafine thin films interface and band alignment of multilayer channel material with compatible gate dielectric are essential. Here, 2D ml hafnium disulfide (HfS 2) and ZrO 2 are employed as channel material and gate dielectric, respectively, and anticipated that vdW interaction of said structures entails the high-quality interface with trivial dangling bonds and defects caused by lattice mismatch. The investigated Al/ZrO 2 /HfS 2 /Al μ-IDE FETs exhibit the subthreshold swing (SS) ∼ 65 mV/dec, Ion/Ioff ratio of ∼ 1E4, transconductance of ∼ 3.99 μ S, effective mobility of ∼ 74 cm 2 /Vs at Vgs of 2 V, and leakage current density of ∼ 33.8 nA/cm 2 at Vgs of − 1 V. Thus, the steep SS, sturdy current saturation, low-voltage operation ( ∼ 3 V), and leakage current establish the potential candidature of HfS 2 and ZrO 2 -based 2-D FETs for both conventional and ubiquitous electronics. For details view doi: 10.1109/TED.2022.3202510
IEEE: Transactions on Electron Devices
Here, we present the first ever report on the authoritative integration of ferroelectric (FE) hafnium zirconium oxide (HZO) over the p-Ge/n-Ge −on−n -Si system. A rudimentary approach for the carrier modulation in the channel was employed using depletion approximation and negative capacitance (NC) to fabricate HZO and thin p-Ge channel-based FET. The TaN/HZO/TaN stacks were optimized and characterized for enhanced ferroelectricity and non-centrosymmetric orthorhombic phase, which is further confirmed with piezoresponse force microscopic (PFM) analysis. The trivial loop hysteresis conditions to validate the NCFET operation was discussed. The devices demonstrated a lower subthreshold swing (SS) of ~23.44 mV/dec and ION/IOFF ratio of 10 5 . The threshold voltage shift Vt=−0.6 and −1.1 V with the body bias voltage of 0.25 and 0.5 V, respectively. Minimum DIBL measured ~26 mV/V, and rule-out gate induces drain lowering (GIDL) effect due to no gate–drain region overlap. For details view doi: 10.1109/TED.2022.3161857
AIP: Applied Physics Letters
This Letter reports Pt/SBT/La2O3/Si, MFIS structures for nonvolatile memory applications. Here SBT is used as a ferroelectric layer due to its expected better endurance & thermal stability than PZT counterparts and La2O3 is used as a superior buffer layer due to its expected better leakage characteristics. The crystallinity of SBT thin films is analyzed using grazing incidence x-ray diffraction (GIXRD) to confirm the ferroelectric phase of SBT. The surface topography of La2O3 and SBT thin films is evaluated using atomic force microscopy (AFM). The electrical characteristics, i.e., memory, data retention, and leakage characteristics, along with the current conduction mechanism, at 300K, are systematically investigated using capacitance–voltage (C–V), capacitance–time (C–T), and current–voltage (I–V) measurements, respectively. Additionally, the ferroelectricity of SBT is confirmed through pulse current– time (I–T) measurements of the Pt/SBT/Pt, Metal/Ferroelectric/Metal (MFM) system. Also, the quality of the buffer layer is validated in Pt/La2O3/Si, Metal/Oxide/Semiconductor (MOS) structures using the C–V and I–V measurements. For details view, DOI: 10.1063/5.0055792
ACS: Applied Electronic Materials
In this review, we cover numerous advances and various important reports on integrating ferroelectric materials for different electronic device applications to give a broad picture, perspectives, projections, comparisons, and discussions, especially for those intending to work on ferroelectric materials, high-speed semiconductor computing/logic devices, and emerging nonvolatile ferroelectric memories. The explanations are kept straightforward from a newbie perspective to relate to the real-world application while also covering the recent advances in the field. For details view, DOI: https://doi.org/10.1021/acsaelm.0c00851
Elsevier: Solid State Electronics
Here, we demonstrate a complete process development of high-quality remote plasma-enhanced atomic layer deposition (Re-PEALD) of Al2O3 thin films for a wide temperature range from ∼100 to 300 deg Celcius suitable for various nanoelectronics applications ranging from flexible substrates to low thermal budget and high mobility alternate semiconductor substrates. For details view, DOI: https://doi.org/10.1016/j.sse.2021.108027
Springer Nature: Microsystem Technologies
Here, we demonstrate a maskless lithography approach to SU-8 based sensitive and high-g Z-axis polymer MEMS accelerometers using serpentine spring structures suitable for navigation, space, and medical applications, using simulation and experimental methods. Thanks to the collaborative efforts of colleagues at IIT Mandi. For details view, DOI: https://doi.org/10.1007/s00542-021-05217-0
IEEE: Transactions on Nanotechnology
Our recent work on Charge trapping investigation of Al/HfO2/epi-Ge on cost-effective Si substrates using nanoscopic KPFM techniques is available online on IEEE Transaction of Nanotechnology. Thanks to the collaborative works of the team at IIT Mandi and the University of Stuttgart. For details view, doi: 10.1109/TNANO.2021.3069820.