IC GALLERY
Dual-Band CMOS Tunable Duplexer Employing Switchable Auto-Transformer for Highly Integrated RF Front-Ends
Blocks: Dual-band CMOS duplexer
Process: Samsung 65nm CMOS process
Size: 0.9mm x 1.3mm
Designer: S. Kim, T. Kim and K. Kwon
Work published in IEEE Microwave and Wireless Components Letters 2019
50-MHz–1-GHz 2.3-dB NF Noise-Cancelling Balun-LNA Employing a Modified Current-Bleeding Technique and Balanced Loads
Blocks: LNA
Process: Samsung 65nm CMOS process
Size: 0.448mm2
Designer: S. Kim and K. Kwon
Work published in IEEE Trans. Circuits and Systems I 2019
Hybrid Transformer-Based CMOS Duplexer With a Single-Ended Notch-Filtered LNA for Highly Integrated Tunable RF Front-Ends
Blocks: CMOS Duplexer + LNA
Process: Samsung 65nm CMOS process
Size: 1.32mm x 0.9mm
Designer: K. Son, S. Kim and K. Kwon
Work published in IEEE Microwave and Wireless Components Letters 2018
Silicon-On-Insulator CMOS Stacked-FET Power Amplifier
Blocks: PA
Process: TSMC 180nm SOI CMOS process
Designer: D. Im, K. Kwon, and I. Lee
Work published in International Journal of Circuit Theory and applications 2017
Transimpedance Amplifier Employing a New DC Offset Cancellation Method for WCDMA/LTE Applications
Blocks: TIA with DCOC
Process: TSMC 130nm CMOS process
Size: 0.46mm x 0.48mm
Designer: C. Lee and K. Kwon
Work published in Journal of Semiconductor Technology and Science 2016
CMOS MedRadio Receiver Front-End
Blocks: RF Front-end
Process: TSMC 180nm CMOS process
Size: 1mm x 0.6mm
Designer: C. Choi, K. Kwon, and I. Nam
Work published in IEEE Microwave and Wireless Components Letters 2016
CMOS Light-Emitting Device for Optical-Type Fingerprint Recognition System
Blocks: CMOS LED/Photodiode
Process: TSMC 180nm CMOS process
Size: 50ÎĽm x 50ÎĽm
Designer: K. Kwon et. al
Work published in IEEE Journal of Display Technology 2016
CMOS Gm-C Tracking Filter for Digital TV Tuner ICs
Blocks: RF filter
Process: TSMC 180nm CMOS process
Size: 1mm x 1.1mm
Designer: K. Kwon
Work published in IEEE Trans. Circuits and Systems II 2015
CMOS RF Variable Gain Amplifier for Digital TV Tuner ICs
Blocks: RFVGA
Process: TSMC 130nm CMOS process
Size: 0.54mm x 0.4mm
Designer: K. Kwon
Work published in International Journal of Circuit Theory and applications 2015
SAW-less Receiver Front-end with new IIP2 calibration scheme for 2G/3G/4G Cellular Applications
Blocks: LNA, Mixer, BBGm, TIA, IIP2 calibration circuitry, LO chain
Process: TSMC 65nm CMOS process
Size: 1.45mm 2
Designer: J. Han and K. Kwon
Work published in IEEE Trans. Circuits and Systems I 2014
SAW-less Receiver Front-end Adopting Switchable Architecture for 2G/3G/4G Cellular Applications
Blocks: Wideband LNA, Mixer, BBGm, TIA, IIP2 calibration circuitry, LO chain
Process: TSMC 65nm CMOS process
Size: 1.71mm 2
Designer: K. Kwon and J. Han
Work published in IEEE Trans. Micro. Theory and Tech. 2014
RF Amplifier Employing New BJT-Based Transconductor Linearization Technique
Blocks: RF amplifier
Process: SAMSUNG LSI 180nm CMOS process
Size: 0.13mm x 0.1mm
Designer: K. Kwon and I. Nam
Work published in IEEE Trans. Micro. Theory and Tech. 2013
Gm-C Filter Employing New BJT-Based Transconductor Linearization Technique
Blocks: Gm-C Filter
Process: SAMSUNG LSI 180nm CMOS process
Size: 0.45mm x 0.3mm
Designer: K. Kwon and I. Nam
Work published in IEEE Trans. Micro. Theory and Tech. 2013
Double Quadrature Harmonic Rejection Architecture Insensitive to Gain and Phase Mismatch for Universal TV Tuner ICs
Blocks: RF Tracking Band-pass Filter, Poly-phase Filter, Doube Quadrature Harmonic Rejection Mixer, Baseband Complex Band-pass Filter
Process: TSMC 130nm CMOS process
Size: 0.6mm x 0.4mm
Designer: J. Ryu, K. Kwon et. al
Work published in IEEE Radio Freq. Integrated Circuits Symp. Dig. 2011
CMOS Hybrid Tracking Filter Adopting RC and Gm-C Topology for Digital TV Tuner ICs
Blocks: RF Tracking Filter
Process: TSMC 180nm CMOS process
Size: 0.6mm x 0.4mm
Designer: K. Kwon
Work published in IEEE Trans. Circuits and Systems I 2011
CMOS Dedicated Short Range Communication Transceiver for the Korea/Japan Electronic Toll Collection System
Blocks: Receiver, Transmitter, PLL, I2C etc.
Process: TSMC 130nm CMOS process
Size: 6.24mm 2
Designer: K. Kwon et. al
Work published in IEEE Trans. Micro. Theory and Tech. 2010
Low-power Wideband RF Front-end IC in Direct Conversion Receiver for Digital TV Tuner Applications
Blocks: Wideband LNA, Tunable Passive LC Filter, Harmonic Rejection Mixer with Calibration, LO Chain
Process: TSMC 130nm CMOS process
Size: 3.1mm x 2.9mm
Designer: H.-K. Cha, K. Kwon et. al
Work published in IEEE Trans. Micro. Theory and Tech. 2010
CMOS RF Tracking Filter Adopting MGTR Transconductor Lineaerization Technique for Digital TV Tuner ICs
Blocks: RF Tracking Filter
Process: TSMC 180nm CMOS process
Size: 1mm x 0.9mm
Designer: K. Kwon
Work published in IEEE Trans. Micro. Theory and Tech. 2009
Highly Linear and Low Noise Differential Bipolar MOSFET Down-converter
Blocks: Down-converter
Process: SAMSUNG LSI 180nm CMOS process
Size: 1mm x 0.9mm
Designer: I. Nan, H. Moon, and K. Kwon
Work published in Electronics Letters 2009
Baseband Analog Circuits with Proposed Design Methodology for Digital TV Tuner ICs
Blocks: Baseband Analog Circuits (Amplifier, filter, DC Offset Cancellation Loop)
Process: TSMC 180nm CMOS process
Size: 1mm x 1.2mm
Designer: K. Kwon
Work published in IEEE Trans. Consumer Electroncis. 2008
Low Power Low-IF Receiver and Direct-Conversion Transmitter for IEEE 802.15.4 WPAN Applications
Blocks: Receiver, Transmtter, LO chain, SPI
Process: TSMC 180nm CMOS process
Size: 1mm x 0.9mm
Designer: I.Nam, K. Kwon, et. al
Work published in IEEE Trans. Micro. Theory and Tech. 2007