Blocks: Dual-band CMOS duplexer
Process: Samsung 65nm CMOS process
Size: 0.9mm x 1.3mm
Designer: S. Kim, T. Kim and K. Kwon
Work published in IEEE Microwave and Wireless Components Letters 2019
Blocks: LNA
Process: Samsung 65nm CMOS process
Size: 0.448mm2
Designer: S. Kim and K. Kwon
Work published in IEEE Trans. Circuits and Systems I 2019
Blocks: CMOS Duplexer + LNA
Process: Samsung 65nm CMOS process
Size: 1.32mm x 0.9mm
Designer: K. Son, S. Kim and K. Kwon
Work published in IEEE Microwave and Wireless Components Letters 2018
Blocks: PA
Process: TSMC 180nm SOI CMOS process
Designer: D. Im, K. Kwon, and I. Lee
Work published in International Journal of Circuit Theory and applications 2017
Blocks: TIA with DCOC
Process: TSMC 130nm CMOS process
Size: 0.46mm x 0.48mm
Designer: C. Lee and K. Kwon
Work published in Journal of Semiconductor Technology and Science 2016
Blocks: RF Front-end
Process: TSMC 180nm CMOS process
Size: 1mm x 0.6mm
Designer: C. Choi, K. Kwon, and I. Nam
Work published in IEEE Microwave and Wireless Components Letters 2016
Blocks: CMOS LED/Photodiode
Process: TSMC 180nm CMOS process
Size: 50ÎĽm x 50ÎĽm
Designer: K. Kwon et. al
Work published in IEEE Journal of Display Technology 2016
Blocks: RF filter
Process: TSMC 180nm CMOS process
Size: 1mm x 1.1mm
Designer: K. Kwon
Work published in IEEE Trans. Circuits and Systems II 2015
Blocks: RFVGA
Process: TSMC 130nm CMOS process
Size: 0.54mm x 0.4mm
Designer: K. Kwon
Work published in International Journal of Circuit Theory and applications 2015
Blocks: LNA, Mixer, BBGm, TIA, IIP2 calibration circuitry, LO chain
Process: TSMC 65nm CMOS process
Size: 1.45mm 2
Designer: J. Han and K. Kwon
Work published in IEEE Trans. Circuits and Systems I 2014
Blocks: Wideband LNA, Mixer, BBGm, TIA, IIP2 calibration circuitry, LO chain
Process: TSMC 65nm CMOS process
Size: 1.71mm 2
Designer: K. Kwon and J. Han
Work published in IEEE Trans. Micro. Theory and Tech. 2014
Blocks: RF amplifier
Process: SAMSUNG LSI 180nm CMOS process
Size: 0.13mm x 0.1mm
Designer: K. Kwon and I. Nam
Work published in IEEE Trans. Micro. Theory and Tech. 2013
Blocks: Gm-C Filter
Process: SAMSUNG LSI 180nm CMOS process
Size: 0.45mm x 0.3mm
Designer: K. Kwon and I. Nam
Work published in IEEE Trans. Micro. Theory and Tech. 2013
Blocks: RF Tracking Band-pass Filter, Poly-phase Filter, Doube Quadrature Harmonic Rejection Mixer, Baseband Complex Band-pass Filter
Process: TSMC 130nm CMOS process
Size: 0.6mm x 0.4mm
Designer: J. Ryu, K. Kwon et. al
Work published in IEEE Radio Freq. Integrated Circuits Symp. Dig. 2011
Blocks: RF Tracking Filter
Process: TSMC 180nm CMOS process
Size: 0.6mm x 0.4mm
Designer: K. Kwon
Work published in IEEE Trans. Circuits and Systems I 2011
Blocks: Receiver, Transmitter, PLL, I2C etc.
Process: TSMC 130nm CMOS process
Size: 6.24mm 2
Designer: K. Kwon et. al
Work published in IEEE Trans. Micro. Theory and Tech. 2010
Blocks: Wideband LNA, Tunable Passive LC Filter, Harmonic Rejection Mixer with Calibration, LO Chain
Process: TSMC 130nm CMOS process
Size: 3.1mm x 2.9mm
Designer: H.-K. Cha, K. Kwon et. al
Work published in IEEE Trans. Micro. Theory and Tech. 2010
Blocks: RF Tracking Filter
Process: TSMC 180nm CMOS process
Size: 1mm x 0.9mm
Designer: K. Kwon
Work published in IEEE Trans. Micro. Theory and Tech. 2009
Blocks: Down-converter
Process: SAMSUNG LSI 180nm CMOS process
Size: 1mm x 0.9mm
Designer: I. Nan, H. Moon, and K. Kwon
Work published in Electronics Letters 2009
Blocks: Baseband Analog Circuits (Amplifier, filter, DC Offset Cancellation Loop)
Process: TSMC 180nm CMOS process
Size: 1mm x 1.2mm
Designer: K. Kwon
Work published in IEEE Trans. Consumer Electroncis. 2008
Blocks: Receiver, Transmtter, LO chain, SPI
Process: TSMC 180nm CMOS process
Size: 1mm x 0.9mm
Designer: I.Nam, K. Kwon, et. al
Work published in IEEE Trans. Micro. Theory and Tech. 2007