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Assistant Professor (Gr. I),

Dept. of Electronics Engineering,

National Institute of Technology Uttarakhand, 

Srinagar (Garhwal), Uttarakhand-246174, India

About him

Dr. Pankaj Kumar Pal has an impressive academic and professional background in the field of Electronics and Communication Engineering, particularly in Microelectronics and VLSI. He received his B.Tech. from Gurukul Kangri University, his M.Tech. from NIT-Hamirpur, and his Ph.D. from IIT-Roorkee. His doctoral research was supervised by Prof. S. Dasgupta and Prof. B. K. Kaushik.

Following his Ph.D., Dr. Pal joined the Department of Electronics Engineering at the National Institute of Technology Uttarakhand. He started as a Teaching Associate and later became an Assistant Professor (Grade-II). Throughout his tenure at NIT Uttarakhand, he took on various significant roles, including Head of the ECE Department, Convener Dept. UG Committee, Coordinator Dept. Purchase Committee , Coordinator of the Innovation Cell & Incubation, and Coordinator of the IPR Cell.

Dr. Pal has made significant contributions to academia, with Q1 publications in esteemed International Journals such as IEEE Transactions in Electron Devices and a book published by CRC Press. He has also been actively involved in mentoring students, having supervised 12 M.Tech. students and guided 2 Ph.D. scholars, with 4 Ph.D. scholars currently under his supervision.

His achievements have been recognized with awards such as the Director’s Medal from NIT-Hamirpur for the highest CGPA in M.Tech. and Best Faculty Award in Year 2023. Dr. Pal is affiliated with several professional organizations, including being a Senior Member of IEEE, a Life Member of ISTE and IEI, and a Fellow of IETE. He is also engaged in reviewing activities for various reputed International Journals and conferences. Additionally, he has played a pivotal role in establishing the IEEE Electron Device Society Student Branch Chapter at IIT-Roorkee.

Dr. Pal's research interests encompass a range of topics within the field, including novel MOS-based devices, FinFET parasitic extraction, semiconductor device modeling, low-power SRAM, and advanced memory design.