This 4-digit hexidecimal counter was built through Vivado VHDL on the XILINX Digilent A7-100T FPGA board.
This project uses modified versions of the core files from our previous lab, including three VHDL source files (leddec.vhd, hexcount.vhd, counter.vhd. The 4-digit hexidecimal counter Vivado project likewise uses a modified version of of the previous lab's constraint file, hexcount.xdc.
Once synthesized, implemented and programmed, the FPGA will use its four leftmost LED indicators to run a high-speed counter across 65536 values, from 0000 to FFFF.
Once the program proved functional, Vivado's memory configuration file was created and tested. By storing the program data within a hexcount.mcs file, the NexysA7 board proved capable of storing and running the program immediately when powered up, independent of any bitstream from the Vivado interface. Some difficulty was encountered regarding the Hardware Manager when creating the memory file, but some simple debugging proved enough to overcome the challenge!