Flip Chip Package / Lead Free Solder / 3D IC / Electromigration
Smaller, thinner and more powerful components have been regarded as the future trends of the electronic appliances, such as laptop PCs, hand phones, Palms etc. These trends set more stringent tasks for electronic packaging industry in recently years. In order to fulfill these requirements, flip chip technology was selected as one of the substitutes for the conventional packaging technologies. In flip chip technology, the Si chip is flipped over and connected to substrate via either area array or peripheral solder bumps, as the figure depicted below. Our research focus on interfacial reaction between the solder bump and the under-bump metallurgy (UBM).
Due to environmental concerns, the need for lead-free solutions in electronic components and systems is receiving increasing attention within the semiconductor and electronics industries. Several types of lead-free solder, such as Sn-Ag, Sn-Ag-Cu, and Sn-Bi, are investigated.
In electronics, a three-dimensional integrated circuit (3D IC, 3D-IC, or 3-D IC) is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit. The semiconductor industry is hotly pursuing this promising technology in many different forms, but it is not yet widely used; consequently, the definition is still somewhat fluid.
3D packaging saves space by stacking separate chips in a single package. This packaging, known as System in Package (SiP) or Chip Stack MCM, does not integrate the chips into a single circuit. The chips in the package communicate with off-chip signaling, much as if they were mounted in separate packages on a normal circuit board. In contrast, a 3D IC is a single chip. All components on the layers communicate with on-chip signaling, whether vertically or horizontally. Essentially, a 3D IC bears the same relation to a 3D package that an SoC bears to a circuit board.
For high performance electronic devices, the current trend is a wider application of flip chip technology to microprocessors and wireless handled electronic consumer products. Flip chip interconnects are used in the electrics industry primarily because of their high I/O density capacity, small profiles, and good electrical performance. It is expected this interconnecting technology will become even more important in the near future.
In flip chip packages, the number of I/O contact pads on a chip surface increases and the diameter of solder bumps decreases, the current density in passing through the contact area of a solder bump increase very rapidly. For example, flip chip interconnect with a 125 μm diameter and 250 μm pitch can form a full array of 2000 interconnects on a chip of 1×1 cm2. If the diameter and pitch are reduced to 50μm and 100 μm, respectively, 10000 interconnects are possible on the chip. Current circuit design rules require that each interconnect carry a current of up to 0.2 amp with an interconnect to 0.4 amp in near future. The current density will reach 104 A/cm2 for the bump with 50 μm diameter.
Electromigration is one of the failure mechanism needed to concern at high current density. The popular composition for flip chip solder bumps is eutectic Sn-Pb solders, although it is challenged by Pb-free solders such as Sn-Ag or Sn-Ag-Cu solders. The eutectic Sn-Pb solder has a low melting point, about 183℃, and a high diffusivity. Electromigration has become a reliability issue for eutectic Sn-Pb flip chip packages, when the devices are operated at harsh ambient temperature such as the automotive hood or engine, and even at room temperature.